| /trusted-firmware-a/bl1/ |
| A D | bl1.ld.S | 23 ROM (rx): ORIGIN = BL1_RO_BASE, LENGTH = BL1_RO_LIMIT - BL1_RO_BASE
29 . = BL1_RO_BASE; define
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| /trusted-firmware-a/plat/hisilicon/poplar/include/ |
| A D | poplar_layout.h | 117 #define BL1_RO_BASE (LLOADER_TEXT_BASE + BL1_RO_OFFSET) macro
118 #define BL1_RO_LIMIT (BL1_RO_BASE + BL1_RO_SIZE)
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| /trusted-firmware-a/plat/hisilicon/hikey/include/ |
| A D | hikey_layout.h | 38 #define BL1_RO_BASE (XG2RAM0_BASE + BL1_XG2RAM0_OFFSET) macro
63 #define BL2_BASE (BL1_RO_BASE) /* 0xf980_1000 */
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| /trusted-firmware-a/plat/hisilicon/hikey960/include/ |
| A D | platform_def.h | 52 #define BL1_RO_BASE (0x1AC00000) macro
53 #define BL1_RO_LIMIT (BL1_RO_BASE + 0x20000)
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| /trusted-firmware-a/plat/marvell/armada/common/ |
| A D | marvell_bl1_setup.c | 61 BL1_RO_BASE, in marvell_bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/hisilicon/poplar/ |
| A D | bl1_plat_setup.c | 87 BL1_RO_BASE, /* l-loader and BL1 ROM */ in bl1_plat_arch_setup()
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| /trusted-firmware-a/include/plat/marvell/armada/a3k/common/ |
| A D | marvell_def.h | 142 #define BL1_RO_BASE PLAT_MARVELL_TRUSTED_ROM_BASE macro
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| /trusted-firmware-a/plat/marvell/armada/a8k/common/include/ |
| A D | platform_def.h | 128 #define PLAT_MARVELL_CPU_ENTRY_ADDR BL1_RO_BASE
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| /trusted-firmware-a/include/plat/marvell/armada/a8k/common/ |
| A D | marvell_def.h | 173 #define BL1_RO_BASE PLAT_MARVELL_TRUSTED_ROM_BASE macro
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| /trusted-firmware-a/plat/hisilicon/hikey/ |
| A D | hikey_bl1_setup.c | 71 BL1_RO_BASE, in bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/marvell/armada/a3k/common/include/ |
| A D | platform_def.h | 118 #define PLAT_MARVELL_CPU_ENTRY_ADDR BL1_RO_BASE
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| /trusted-firmware-a/plat/layerscape/board/ls1043/include/ |
| A D | platform_def.h | 81 #define BL1_RO_BASE PLAT_LS_TRUSTED_ROM_BASE macro
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| /trusted-firmware-a/plat/intel/soc/common/include/ |
| A D | platform_def.h | 120 #define BL1_RO_BASE (0xffe00000) macro
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| /trusted-firmware-a/plat/brcm/board/stingray/include/ |
| A D | platform_def.h | 94 #define BL1_RO_BASE PLAT_BRCM_TRUSTED_ROM_BASE macro
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| /trusted-firmware-a/plat/rpi/rpi3/include/ |
| A D | platform_def.h | 169 #define BL1_RO_BASE SEC_ROM_BASE macro
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| /trusted-firmware-a/plat/arm/board/fvp_r/include/ |
| A D | platform_def.h | 75 #define PLAT_BL1_RO_LIMIT (BL1_RO_BASE \
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| /trusted-firmware-a/plat/qemu/qemu/include/ |
| A D | platform_def.h | 129 #define BL1_RO_BASE SEC_ROM_BASE macro
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| /trusted-firmware-a/build/qemu/release/bl1/ |
| A D | bl1.ld | 12 "BL1_RO_BASE address is not aligned on a page boundary.")
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| A D | bl1.map | 576 …0x0000000000000001 ASSERT ((. == ALIGN (0x1000)), BL1_RO_BASE address is not aligne…
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| /trusted-firmware-a/plat/hisilicon/hikey960/ |
| A D | hikey960_bl1_setup.c | 103 BL1_RO_BASE, in bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/arm/board/a5ds/include/ |
| A D | platform_def.h | 216 #define BL1_RO_BASE 0x00000000 macro
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| /trusted-firmware-a/plat/arm/board/fvp_ve/include/ |
| A D | platform_def.h | 199 #define BL1_RO_BASE 0x00000000 macro
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| /trusted-firmware-a/plat/qemu/qemu_sbsa/include/ |
| A D | platform_def.h | 116 #define BL1_RO_BASE SEC_ROM_BASE macro
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| /trusted-firmware-a/include/plat/arm/common/ |
| A D | arm_def.h | 496 #define BL1_RO_BASE PLAT_ARM_TRUSTED_ROM_BASE macro
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| /trusted-firmware-a/docs/design/ |
| A D | firmware-design.rst | 143 vector defined by the constant ``BL1_RO_BASE``. The BL1 data section is copied
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