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Searched refs:BL1_RO_LIMIT (Results 1 – 22 of 22) sorted by relevance

/trusted-firmware-a/plat/hisilicon/hikey/include/
A Dhikey_layout.h39 #define BL1_RO_LIMIT (XG2RAM0_BASE + 0x18000) macro
40 #define BL1_RW_BASE (BL1_RO_LIMIT) /* 0xf981_8000 */
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dplatform_def.h53 #define BL1_RO_LIMIT (BL1_RO_BASE + 0x20000) macro
54 #define BL1_RW_BASE (BL1_RO_LIMIT) /* 1AC2_0000 */
/trusted-firmware-a/bl1/
A Dbl1.ld.S23 ROM (rx): ORIGIN = BL1_RO_BASE, LENGTH = BL1_RO_LIMIT - BL1_RO_BASE
138 ASSERT(__BL1_ROM_END__ <= BL1_RO_LIMIT,
/trusted-firmware-a/plat/marvell/armada/common/
A Dmarvell_bl1_setup.c62 BL1_RO_LIMIT, in marvell_bl1_plat_arch_setup()
/trusted-firmware-a/plat/hisilicon/poplar/include/
A Dpoplar_layout.h118 #define BL1_RO_LIMIT (BL1_RO_BASE + BL1_RO_SIZE) macro
/trusted-firmware-a/plat/hisilicon/poplar/
A Dbl1_plat_setup.c88 BL1_RO_LIMIT, in bl1_plat_arch_setup()
/trusted-firmware-a/include/plat/marvell/armada/a3k/common/
A Dmarvell_def.h143 #define BL1_RO_LIMIT (PLAT_MARVELL_TRUSTED_ROM_BASE \ macro
/trusted-firmware-a/include/plat/arm/common/
A Darm_def.h498 #define BL1_RO_LIMIT PLAT_BL1_RO_LIMIT macro
500 #define BL1_RO_LIMIT (PLAT_ARM_TRUSTED_ROM_BASE \ macro
515 #define ROMLIB_RO_BASE BL1_RO_LIMIT
/trusted-firmware-a/include/plat/marvell/armada/a8k/common/
A Dmarvell_def.h174 #define BL1_RO_LIMIT (PLAT_MARVELL_TRUSTED_ROM_BASE \ macro
/trusted-firmware-a/plat/hisilicon/hikey/
A Dhikey_bl1_setup.c72 BL1_RO_LIMIT, in bl1_plat_arch_setup()
/trusted-firmware-a/plat/layerscape/board/ls1043/include/
A Dplatform_def.h82 #define BL1_RO_LIMIT (PLAT_LS_TRUSTED_ROM_BASE \ macro
/trusted-firmware-a/include/plat/brcm/common/
A Dbrcm_def.h26 #define BL1_ROM_TABLE (BL1_RO_LIMIT - ROM_TABLE_SIZE)
/trusted-firmware-a/plat/intel/soc/common/include/
A Dplatform_def.h121 #define BL1_RO_LIMIT (0xffe0f000) macro
/trusted-firmware-a/plat/brcm/board/stingray/include/
A Dplatform_def.h95 #define BL1_RO_LIMIT (PLAT_BRCM_TRUSTED_ROM_BASE \ macro
/trusted-firmware-a/plat/rpi/rpi3/include/
A Dplatform_def.h170 #define BL1_RO_LIMIT (SEC_ROM_BASE + SEC_ROM_SIZE) macro
/trusted-firmware-a/plat/qemu/qemu/include/
A Dplatform_def.h130 #define BL1_RO_LIMIT (SEC_ROM_BASE + SEC_ROM_SIZE) macro
/trusted-firmware-a/plat/hisilicon/hikey960/
A Dhikey960_bl1_setup.c104 BL1_RO_LIMIT, in bl1_plat_arch_setup()
/trusted-firmware-a/plat/arm/board/a5ds/include/
A Dplatform_def.h217 #define BL1_RO_LIMIT PLAT_ARM_TRUSTED_ROM_SIZE macro
/trusted-firmware-a/plat/arm/board/fvp_ve/include/
A Dplatform_def.h200 #define BL1_RO_LIMIT PLAT_ARM_TRUSTED_ROM_SIZE macro
/trusted-firmware-a/plat/qemu/qemu_sbsa/include/
A Dplatform_def.h117 #define BL1_RO_LIMIT (SEC_ROM_BASE + SEC_ROM_SIZE) macro
/trusted-firmware-a/docs/getting_started/
A Dporting-guide.rst184 - **#define : BL1_RO_LIMIT**
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/getting_started/
A Dporting-guide.rst.txt184 - **#define : BL1_RO_LIMIT**

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