| /trusted-firmware-a/plat/nxp/common/setup/aarch64/ |
| A D | ls_bl2_mem_params_desc.c | 32 .ep_info.pc = BL31_BASE,
42 .image_info.image_base = BL31_BASE - CSF_HDR_SZ,
43 .image_info.image_max_size = (BL31_LIMIT - BL31_BASE) +
46 .image_info.image_base = BL31_BASE,
47 .image_info.image_max_size = (BL31_LIMIT - BL31_BASE),
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| /trusted-firmware-a/plat/nxp/common/include/default/ |
| A D | plat_default_def.h | 82 #ifndef BL31_BASE
84 #define BL31_BASE NXP_SECURE_DRAM_ADDR macro
92 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
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| /trusted-firmware-a/plat/brcm/board/stingray/include/ |
| A D | platform_def.h | 145 #define BL31_BASE BRCM_AP_TZC_DRAM1_BASE macro
151 #define BL31_BASE (NOR_BASE_ADDR + NOR_SIZE - \ macro
160 #define SCP_BL2_BASE BL31_BASE
203 #define SECURE_DDR_BASE_ADDRESS BL31_BASE
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| /trusted-firmware-a/include/plat/marvell/armada/a3k/common/ |
| A D | marvell_def.h | 160 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE)
161 #define BL2_LIMIT BL31_BASE
170 #define BL31_BASE (MARVELL_BL_RAM_BASE + \ macro
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| /trusted-firmware-a/plat/intel/soc/common/ |
| A D | bl2_plat_mem_params_desc.c | 67 .ep_info.pc = BL31_BASE,
73 .image_info.image_base = BL31_BASE,
74 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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| /trusted-firmware-a/plat/arm/board/diphda/common/ |
| A D | diphda_bl2_mem_params_desc.c | 28 .ep_info.pc = BL31_BASE,
34 .image_info.image_base = BL31_BASE,
35 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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| /trusted-firmware-a/plat/allwinner/sun50i_h616/ |
| A D | prepare_dtb.c | 29 if (fdt_add_reserved_memory(fdt, "tf-a@40000000", BL31_BASE, in sunxi_prepare_dtb()
30 BL31_LIMIT - BL31_BASE)) { in sunxi_prepare_dtb()
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| /trusted-firmware-a/plat/brcm/common/ |
| A D | brcm_bl2_mem_params_desc.c | 46 .ep_info.pc = BL31_BASE,
55 .image_info.image_base = BL31_BASE,
56 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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| /trusted-firmware-a/include/plat/marvell/armada/a8k/common/ |
| A D | marvell_def.h | 196 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE)
197 #define BL2_LIMIT BL31_BASE
205 #define BL31_BASE (MARVELL_BL_RAM_BASE + \ macro
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| /trusted-firmware-a/plat/renesas/common/ |
| A D | bl2_plat_mem_params_desc.c | 34 .ep_info.pc = BL31_BASE,
39 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
40 .image_info.image_base = BL31_BASE,
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| /trusted-firmware-a/plat/imx/imx8m/imx8mm/ |
| A D | imx8mm_bl2_mem_params_desc.c | 18 .ep_info.pc = BL31_BASE,
23 .image_info.image_base = BL31_BASE,
24 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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| A D | imx8mm_bl31_setup.c | 144 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
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| /trusted-firmware-a/plat/imx/imx8m/imx8mp/ |
| A D | imx8mp_bl2_mem_params_desc.c | 18 .ep_info.pc = BL31_BASE,
23 .image_info.image_base = BL31_BASE,
24 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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| A D | imx8mp_bl31_setup.c | 142 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
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| /trusted-firmware-a/plat/layerscape/common/aarch64/ |
| A D | ls_bl2_mem_params_desc.c | 54 .ep_info.pc = BL31_BASE,
63 .image_info.image_base = BL31_BASE,
64 .image_info.image_max_size = (BL31_LIMIT - BL31_BASE),
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| /trusted-firmware-a/plat/qemu/qemu/include/ |
| A D | platform_def.h | 140 #define BL2_BASE (BL31_BASE - 0x25000)
141 #define BL2_LIMIT BL31_BASE
149 #define BL31_BASE (BL31_LIMIT - 0x20000) macro
160 #define BL32_SRAM_LIMIT BL31_BASE
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| /trusted-firmware-a/plat/rpi/rpi3/aarch64/ |
| A D | rpi3_bl2_mem_params_desc.c | 30 .ep_info.pc = BL31_BASE,
39 .image_info.image_base = BL31_BASE,
40 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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| /trusted-firmware-a/bl31/ |
| A D | bl31.ld.S | 16 RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE
30 . = BL31_BASE; define
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| /trusted-firmware-a/plat/hisilicon/poplar/include/ |
| A D | poplar_layout.h | 129 #define BL31_BASE (LLOADER_TEXT_BASE + BL31_OFFSET) macro
130 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
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| /trusted-firmware-a/plat/xilinx/zynqmp/ |
| A D | bl31_zynqmp_setup.c | 195 if (fdt_add_reserved_memory(dtb, "tf-a", BL31_BASE, BL31_LIMIT - BL31_BASE)) { in prepare_dtb()
249 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, in bl31_plat_arch_setup()
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| /trusted-firmware-a/plat/allwinner/common/include/ |
| A D | platform_def.h | 18 #define BL31_BASE SUNXI_DRAM_BASE macro
28 #define BL31_BASE (SUNXI_SRAM_A2_BASE + \ macro
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| /trusted-firmware-a/plat/socionext/uniphier/include/ |
| A D | platform_def.h | 56 #define BL31_BASE (UNIPHIER_MEM_BASE + UNIPHIER_BL31_OFFSET) macro
57 #define BL31_LIMIT (BL31_BASE + UNIPHIER_BL31_MAX_SIZE)
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| /trusted-firmware-a/plat/xilinx/versal/include/ |
| A D | platform_def.h | 34 # define BL31_BASE 0xfffe0000 macro
37 # define BL31_BASE (VERSAL_ATF_MEM_BASE) macro
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| /trusted-firmware-a/plat/imx/imx8m/imx8mn/ |
| A D | imx8mn_bl31_setup.c | 144 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
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| /trusted-firmware-a/plat/xilinx/zynqmp/include/ |
| A D | platform_def.h | 40 # define BL31_BASE 0xfffea000 macro
43 # define BL31_BASE 0x1000 macro
47 # define BL31_BASE (ZYNQMP_ATF_MEM_BASE) macro
|