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Searched refs:BL31_LIMIT (Results 1 – 25 of 89) sorted by relevance

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/trusted-firmware-a/plat/renesas/common/include/
A Dplat.ld.S14 PRAM (r): ORIGIN = BL31_LIMIT - DEVICE_SRAM_SIZE, LENGTH = DEVICE_SRAM_SIZE
20 . = BL31_LIMIT - DEVICE_SRAM_SIZE; define
31 ASSERT(__BL31_END__ <= BL31_LIMIT - DEVICE_SRAM_SIZE,
/trusted-firmware-a/plat/allwinner/common/include/
A Dplatform_def.h19 #define BL31_LIMIT (SUNXI_DRAM_BASE + 0x40000) macro
30 #define BL31_LIMIT (SUNXI_SRAM_A2_BASE + \ macro
43 #define SUNXI_SCP_BASE BL31_LIMIT
/trusted-firmware-a/plat/hisilicon/hikey/include/
A Dhikey_layout.h80 #define BL31_LIMIT (0xF9898000) macro
89 #define BL32_SRAM_BASE BL31_LIMIT
90 #define BL32_SRAM_LIMIT (BL31_LIMIT+0x80000) /* 512K */
/trusted-firmware-a/plat/xilinx/zynqmp/include/
A Dplatform_def.h41 # define BL31_LIMIT 0xffffffff macro
44 # define BL31_LIMIT 0x7ffff macro
48 # define BL31_LIMIT (ZYNQMP_ATF_MEM_BASE + ZYNQMP_ATF_MEM_SIZE - 1) macro
92 #if (BL31_LIMIT < PLAT_DDR_LOWMEM_MAX)
/trusted-firmware-a/bl31/
A Dbl31.ld.S16 RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE
133 ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.")
193 ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.")
/trusted-firmware-a/plat/xilinx/zynqmp/
A Dbl31_zynqmp_setup.c166 #if (BL31_LIMIT < PLAT_DDR_LOWMEM_MAX)
195 if (fdt_add_reserved_memory(dtb, "tf-a", BL31_BASE, BL31_LIMIT - BL31_BASE)) { in prepare_dtb()
211 #if (BL31_LIMIT < PLAT_DDR_LOWMEM_MAX) in bl31_platform_setup()
245 #if (BL31_LIMIT < PLAT_DDR_LOWMEM_MAX) in bl31_plat_arch_setup()
A Dzynqmp_sdei.c19 return (entrypoint < BL31_BASE || entrypoint > BL31_LIMIT) ? 0 : -1; in arm_validate_ns_entrypoint()
/trusted-firmware-a/plat/xilinx/versal/include/
A Dplatform_def.h35 # define BL31_LIMIT 0xffffffff macro
38 # define BL31_LIMIT (VERSAL_ATF_MEM_BASE + VERSAL_ATF_MEM_SIZE - 1) macro
/trusted-firmware-a/plat/brcm/board/stingray/include/
A Dplatform_def.h147 #define BL31_LIMIT (BRCM_AP_TZC_DRAM1_BASE + \ macro
154 #define BL31_LIMIT (NOR_BASE_ADDR + NOR_SIZE) macro
157 #define SECURE_DDR_END_ADDRESS BL31_LIMIT
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dplatform_def.h68 #define BL31_LIMIT (BL31_BASE + 0x40000) /* 1AC9_8000 */ macro
104 #define NS_BL1U_BASE (BL31_LIMIT) /* 1AC9_8000 */
/trusted-firmware-a/plat/arm/board/arm_fpga/include/
A Dplatform_def.h33 #define BL31_LIMIT UL(0x80070000) macro
36 #define BL31_LIMIT UL(0x01000000) macro
/trusted-firmware-a/plat/nxp/common/include/default/
A Dplat_default_def.h91 #ifndef BL31_LIMIT
92 #define BL31_LIMIT (BL31_BASE + BL31_SIZE) macro
/trusted-firmware-a/plat/imx/imx8qx/
A Dimx8qx_bl31_setup.c244 if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { in imx8_partition_resources()
259 if ((BL31_LIMIT - 1) < end) { in imx8_partition_resources()
260 err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end); in imx8_partition_resources()
263 (sc_faddr_t)BL31_LIMIT, end); in imx8_partition_resources()
267 (sc_faddr_t)BL31_LIMIT, end); in imx8_partition_resources()
/trusted-firmware-a/plat/nxp/common/setup/aarch64/
A Dls_bl2_mem_params_desc.c43 .image_info.image_max_size = (BL31_LIMIT - BL31_BASE) +
47 .image_info.image_max_size = (BL31_LIMIT - BL31_BASE),
/trusted-firmware-a/plat/layerscape/board/ls1043/include/
A Dplatform_def.h103 #define BL31_LIMIT (LS_SRAM_BASE + PLAT_LS_MAX_BL31_SIZE) macro
127 #define BL1_RW_BASE BL31_LIMIT
/trusted-firmware-a/plat/imx/imx8qm/
A Dimx8qm_bl31_setup.c267 if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { in mx8_partition_resources()
282 if ((BL31_LIMIT - 1) < end) { in mx8_partition_resources()
283 err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end); in mx8_partition_resources()
286 (sc_faddr_t)BL31_LIMIT, end); in mx8_partition_resources()
290 (sc_faddr_t)BL31_LIMIT, end); in mx8_partition_resources()
/trusted-firmware-a/plat/rockchip/rk3399/include/shared/
A Dbl31_param.h24 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE) macro
/trusted-firmware-a/bl31/aarch64/
A Dbl31_entrypoint.S52 _pie_fixup_size=BL31_LIMIT - BL31_BASE
68 _pie_fixup_size=BL31_LIMIT - BL31_BASE
/trusted-firmware-a/plat/imx/imx8m/imx8mm/include/
A Dplatform_def.h44 #define BL31_LIMIT U(0x920000) macro
55 #define BL31_LIMIT U(0x940000) macro
/trusted-firmware-a/plat/allwinner/sun50i_h616/
A Dprepare_dtb.c30 BL31_LIMIT - BL31_BASE)) { in sunxi_prepare_dtb()
/trusted-firmware-a/plat/rpi/rpi3/include/
A Dplatform_def.h193 #define BL31_BASE (BL31_LIMIT - PLAT_MAX_BL31_SIZE)
194 #define BL31_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/trusted-firmware-a/plat/qemu/qemu/include/
A Dplatform_def.h149 #define BL31_BASE (BL31_LIMIT - 0x20000)
150 #define BL31_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/trusted-firmware-a/plat/hisilicon/poplar/include/
A Dpoplar_layout.h130 #define BL31_LIMIT (BL31_BASE + BL31_SIZE) macro
/trusted-firmware-a/plat/imx/imx8qx/include/
A Dplatform_def.h31 #define BL31_LIMIT 0x80020000 macro
/trusted-firmware-a/include/plat/arm/common/
A Darm_def.h546 #define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \ macro
566 # define BL31_LIMIT PLAT_ARM_MAX_BL31_SIZE macro
577 #define BL31_LIMIT BL2_BASE macro
579 #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) macro

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