Searched refs:BPIALL (Results 1 – 6 of 6) sorted by relevance
53 Secure-EL1 and executing the ``BPIALL`` instruction. This workaround is75 disable/enable" and "BPIALL at AArch32 Secure-EL1" workarounds described above.79 it needs to save/restore. Although the ``BPIALL`` instruction is not effective97 | ``PSCI_VERSION`` with "BPIALL at AArch32 Secure-EL1" | 1276 |99 | ``SMCCC_ARCH_WORKAROUND_1`` with "BPIALL at AArch32 Secure-EL1" | 770 |109 Cortex-A17), the ``BPIALL`` instruction should be used as early as possible on111 early processor initialization. Note that the ``BPIALL`` instruction is not
26 stcopr r0, BPIALL
179 stcopr r0, BPIALL
548 #define BPIALL p15, 0, c7, c5, 6 macro
45306 Secure\sphinxhyphen{}EL1 and executing the \sphinxcode{\sphinxupquote{BPIALL}} instruction. This wo…45331 disable/enable” and “BPIALL at AArch32 Secure\sphinxhyphen{}EL1” workarounds described above.45335 it needs to save/restore. Although the \sphinxcode{\sphinxupquote{BPIALL}} instruction is not effec…45385 \sphinxcode{\sphinxupquote{PSCI\_VERSION}} with “BPIALL at AArch32 Secure\sphinxhyphen{}EL1”45392 \sphinxcode{\sphinxupquote{SMCCC\_ARCH\_WORKAROUND\_1}} with “BPIALL at AArch32 Secure\sphinxhyphen…45411 Cortex\sphinxhyphen{}A17), the \sphinxcode{\sphinxupquote{BPIALL}} instruction should be used as ea…45413 early processor initialization. Note that the \sphinxcode{\sphinxupquote{BPIALL}} instruction is not
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