Searched refs:CPU_CMPLX_RESET_CLR (Results 1 – 1 of 1) sorted by relevance
32 #define CPU_CMPLX_RESET_CLR 0x454 macro566 mmio_write_32(TEGRA_CAR_RESET_BASE + CPU_CMPLX_RESET_CLR, mask); in tegra_soc_pwr_domain_on()
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