CPU_INTR_S_STAT (reference) in projects: trusted-firmware-a

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Searched refs:CPU_INTR_S_STAT (Results 1 – 5 of 5) sorted by relevance

/trusted-firmware-a/plat/socionext/synquacer/drivers/mhu/
A D	sq_mhu.c	`24 #define CPU_INTR_S_STAT 0x300 macro 44 while (mmio_read_32(PLAT_SQ_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_start() 52 assert(!(mmio_read_32(PLAT_SQ_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_send() 92 assert(mmio_read_32(PLAT_SQ_MHU_BASE + CPU_INTR_S_STAT) == 0); in mhu_secure_init()`
/trusted-firmware-a/drivers/arm/css/mhu/
A D	css_mhu.c	`23 #define CPU_INTR_S_STAT 0x300 macro 47 while (mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_start() 55 assert(!(mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_send() 94 assert(mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) == 0); in mhu_secure_init()`
/trusted-firmware-a/plat/brcm/common/
A D	brcm_mhu.c	`26 #define CPU_INTR_S_STAT CRMU_IHOST_SW_PERSISTENT_REG10 macro 48 if (!(mmio_read_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_start() 64 assert(!(mmio_read_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_send() 124 mmio_write_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_STAT, 0); in mhu_secure_init()`
/trusted-firmware-a/plat/arm/board/corstone700/common/drivers/mhu/
A D	mhu.c	`47 intr_stat_check = (mmio_read_32(address + CPU_INTR_S_STAT) & in mhu_secure_message_start() 71 assert((mmio_read_32(address + CPU_INTR_S_STAT) & in mhu_secure_message_send() 116 assert(mmio_read_32(PLAT_SDK700_MHU0_SEND + CPU_INTR_S_STAT) == 0); in mhu_secure_init()`
A D	mhu.h	`13 #define CPU_INTR_S_STAT 0x00 macro`

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