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Searched refs:CRG_CLKDIV20_REG (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/hisilicon/hikey960/
A Dhikey960_bl_common.c63 mmio_write_32(CRG_CLKDIV20_REG, 0x00020002); in set_vivobus_power_up()
110 mmio_write_32(CRG_CLKDIV20_REG, 0x00040004); in set_vcodec_power_up()
186 mmio_write_32(CRG_CLKDIV20_REG, 0x00100010); in set_isp_power_up()
194 mmio_write_32(CRG_CLKDIV20_REG, 0x00100000); in set_isp_power_up()
202 mmio_write_32(CRG_CLKDIV20_REG, 0x00100010); in set_isp_power_up()
223 mmio_write_32(CRG_CLKDIV20_REG, 0x02000200); in set_ivp_power_up()
228 mmio_write_32(CRG_CLKDIV20_REG, 0x02000000); in set_ivp_power_up()
235 mmio_write_32(CRG_CLKDIV20_REG, 0x02000200); in set_ivp_power_up()
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dhi3660_crg.h114 #define CRG_CLKDIV20_REG (CRG_REG_BASE + 0x0F8) macro

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