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Searched refs:CRG_PERRSTDIS3_REG (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a/plat/hisilicon/hikey960/
A Dhikey960_bl_common.c94 mmio_write_32(CRG_PERRSTDIS3_REG, 0x00000c00); in set_dss_power_up()
137 mmio_write_32(CRG_PERRSTDIS3_REG, 0x00000200); in set_vdec_power_up()
168 mmio_write_32(CRG_PERRSTDIS3_REG, 0x00000100); in set_venc_power_up()
313 mmio_write_32(CRG_PERRSTDIS3_REG, 0x8c000000); in set_pcie_power_up()
A Dhikey960_bl1_setup.c155 mmio_write_32(CRG_PERRSTDIS3_REG, PERI_ARST_UFS_BIT); in hikey960_ufs_reset()
164 mmio_write_32(CRG_PERRSTDIS3_REG, PERI_UFS_BIT); in hikey960_ufs_reset()
A Dhikey960_bl2_setup.c130 mmio_write_32(CRG_PERRSTDIS3_REG, PERI_ARST_UFS_BIT); in hikey960_ufs_reset()
139 mmio_write_32(CRG_PERRSTDIS3_REG, PERI_UFS_BIT); in hikey960_ufs_reset()
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dhi3660_crg.h49 #define CRG_PERRSTDIS3_REG (CRG_REG_BASE + 0x088) macro

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