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Searched refs:CRL_APB_BOOT_ENABLE_PIN_1 (Results 1 – 1 of 1) sorted by relevance

/trusted-firmware-a/plat/xilinx/zynqmp/include/
A Dzynqmp_def.h67 #define CRL_APB_BOOT_ENABLE_PIN_1 (U(0x1) << \ macro
72 #define ZYNQMP_ULPI_RESET_VAL_HIGH (CRL_APB_BOOT_ENABLE_PIN_1 | \
74 #define ZYNQMP_ULPI_RESET_VAL_LOW CRL_APB_BOOT_ENABLE_PIN_1

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