Searched refs:CRU_SOFTRSTS_CON (Results 1 – 9 of 9) sorted by relevance
| /trusted-firmware-a/plat/rockchip/rk3288/drivers/secure/ |
| A D | secure.c | 147 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(1), in secure_sgrf_init()
150 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(4), in secure_sgrf_init()
156 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(1), (RST_DMA1_MSK << 16)); in secure_sgrf_init()
158 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(4), (RST_DMA2_MSK << 16)); in secure_sgrf_init()
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| /trusted-firmware-a/plat/rockchip/rk3368/drivers/soc/ |
| A D | soc.c | 90 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(1), in sgrf_init()
93 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(4), in sgrf_init()
99 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(1), (RST_DMA1_MSK << 16)); in sgrf_init()
101 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(4), (RST_DMA2_MSK << 16)); in sgrf_init()
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| A D | soc.h | 70 #define CRU_SOFTRSTS_CON(n) (CRU_SOFTRST_CON + ((n) * 4)) macro
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| /trusted-firmware-a/plat/rockchip/rk3288/drivers/pmu/ |
| A D | pmu.c | 217 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(0), in cpus_power_domain_on()
226 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(0), BIT(cpu_id) << 16); in cpus_power_domain_on()
242 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(0), in cpus_power_domain_off()
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| /trusted-firmware-a/plat/rockchip/rk3328/drivers/soc/ |
| A D | soc.c | 146 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(3), DMA_SOFTRST_REQ); in sgrf_init()
148 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(3), DMA_SOFTRST_RLS); in sgrf_init()
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| A D | soc.h | 44 #define CRU_SOFTRSTS_CON(n) (0x300 + ((n) * 4)) macro
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| /trusted-firmware-a/plat/rockchip/px30/drivers/soc/ |
| A D | soc.h | 68 #define CRU_SOFTRSTS_CON(n) (CRU_SOFTRST_CON + ((n) * 4)) macro
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| /trusted-firmware-a/plat/rockchip/rk3288/drivers/soc/ |
| A D | soc.h | 35 #define CRU_SOFTRSTS_CON(n) (CRU_SOFTRST_CON + ((n) * 4)) macro
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| /trusted-firmware-a/plat/rockchip/rk3368/drivers/ddr/ |
| A D | ddr_rk3368.c | 436 p_ddr_reg->crupctlphysoftrstaddr = CRU_BASE + CRU_SOFTRSTS_CON(10); in ddr_reg_save()
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