Searched refs:CSS_SGI_REMOTE_CHIP_MEM_OFFSET (Results 1 – 6 of 6) sorted by relevance
| /trusted-firmware-a/plat/arm/board/rdv1mc/ |
| A D | rdv1mc_plat.c | 37 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16,
39 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2)) >> 16,
42 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3)) >> 16,
61 PLAT_ARM_GICR_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1),
64 PLAT_ARM_GICR_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2),
68 PLAT_ARM_GICR_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3),
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| A D | rdv1mc_security.c | 59 arm_tzc400_setup(CSS_SGI_REMOTE_CHIP_MEM_OFFSET(i) in plat_arm_security_setup()
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| /trusted-firmware-a/plat/arm/css/sgi/include/ |
| A D | sgi_base_platform_def.h | 25 #define CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) ((ULL(1) << 42) * (n)) macro
157 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + \
165 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + \
173 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + \
254 {CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_BASE, \
255 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_END, \
257 {CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM2_BASE, \
258 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM2_END, \
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| /trusted-firmware-a/plat/arm/css/sgi/ |
| A D | sgi_bl31_setup.c | 42 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1),
44 + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1) + SENDER_REG_SET(0),
53 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2),
55 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2) + SENDER_REG_SET(0),
64 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3),
66 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3) + SENDER_REG_SET(0),
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| /trusted-firmware-a/plat/arm/board/rdv1mc/include/ |
| A D | platform_def.h | 50 #define PLAT_PHY_ADDR_SPACE_SIZE CSS_SGI_REMOTE_CHIP_MEM_OFFSET( \
52 #define PLAT_VIRT_ADDR_SPACE_SIZE CSS_SGI_REMOTE_CHIP_MEM_OFFSET( \
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| /trusted-firmware-a/plat/arm/board/rdn1edge/ |
| A D | rdn1edge_plat.c | 27 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16
38 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1), /* Chip 1's GICR BASE */
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