Searched refs:CTX_SCR_EL3 (Results 1 – 9 of 9) sorted by relevance
| /trusted-firmware-a/lib/extensions/sme/ |
| A D | sme.c | 52 reg = read_ctx_reg(state, CTX_SCR_EL3); in sme_enable()
54 write_ctx_reg(state, CTX_SCR_EL3, reg); in sme_enable()
100 reg = read_ctx_reg(state, CTX_SCR_EL3); in sme_disable()
102 write_ctx_reg(state, CTX_SCR_EL3, reg); in sme_disable()
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| /trusted-firmware-a/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 352 write_ctx_reg(state, CTX_SCR_EL3, scr_el3); in cm_setup_context()
489 CTX_SCR_EL3); in cm_prepare_el3_exit()
842 scr_el3 = read_ctx_reg(state, CTX_SCR_EL3); in cm_write_scr_el3_bit()
845 write_ctx_reg(state, CTX_SCR_EL3, scr_el3); in cm_write_scr_el3_bit()
862 return read_ctx_reg(state, CTX_SCR_EL3); in cm_get_scr_el3()
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| A D | context.S | 908 ldr x18, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
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| /trusted-firmware-a/bl31/aarch64/ |
| A D | ea_delegate.S | 255 stp x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
302 ldp x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
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| A D | runtime_exceptions.S | 501 str x18, [x6, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
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| /trusted-firmware-a/plat/arm/common/aarch64/ |
| A D | execution_state_switch.c | 95 scr = read_ctx_reg(el3_ctx, CTX_SCR_EL3); in arm_execution_state_switch()
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| /trusted-firmware-a/services/std_svc/sdei/ |
| A D | sdei_private.h | 169 return ((read_ctx_reg(el3_ctx, CTX_SCR_EL3) & SCR_HCE_BIT) != 0U) ? in sdei_client_el()
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| /trusted-firmware-a/bl1/aarch64/ |
| A D | bl1_exceptions.S | 274 str x18, [x6, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
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| /trusted-firmware-a/include/lib/el3_runtime/aarch64/ |
| A D | context.h | 57 #define CTX_SCR_EL3 U(0x0) macro
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