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Searched refs:DIR_BASE (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/mediatek/common/drivers/gpio/
A Dmtgpio_common.c21 #define DIR_BASE (GPIO_BASE + 0x000) macro
39 mmio_write_32(DIR_BASE + 0x10U * pos + CLR, 1U << bit); in mt_set_gpio_dir_chip()
41 mmio_write_32(DIR_BASE + 0x10U * pos + SET, 1U << bit); in mt_set_gpio_dir_chip()
55 reg = mmio_read_32(DIR_BASE + 0x10U * pos); in mt_get_gpio_dir_chip()
/trusted-firmware-a/plat/mediatek/mt8183/drivers/gpio/
A Dmtgpio.c25 #define DIR_BASE (GPIO_BASE + 0x000) macro
45 mmio_write_32(DIR_BASE + 0x10 * pos + CLR, 1U << bit); in mt_set_gpio_dir_chip()
47 mmio_write_32(DIR_BASE + 0x10 * pos + SET, 1U << bit); in mt_set_gpio_dir_chip()
60 reg = mmio_read_32(DIR_BASE + 0x10 * pos); in mt_get_gpio_dir_chip()

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