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Searched refs:DRAM_0_TID (Results 1 – 10 of 10) sorted by relevance

/trusted-firmware-a/plat/marvell/armada/a8k/a70x0_mochabin/board/
A Dmarvell_plat_config.c111 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
121 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/armada/a8k/a70x0_amc/board/
A Dmarvell_plat_config.c100 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
110 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/armada/a8k/a70x0/board/
A Dmarvell_plat_config.c109 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
119 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/octeontx/otx2/t91/t9130/board/
A Dmarvell_plat_config.c160 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
170 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/armada/a8k/a80x0_mcbin/board/
A Dmarvell_plat_config.c168 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
178 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/octeontx/otx2/t91/t9130_cex7_eval/board/
A Dmarvell_plat_config.c191 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
202 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/armada/a8k/a80x0/board/
A Dmarvell_plat_config.c138 {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, DRAM_0_TID},
148 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/armada/a8k/a80x0_puzzle/board/
A Dmarvell_plat_config.c179 return DRAM_0_TID; in marvell_get_ccu_gcr_target()
/trusted-firmware-a/plat/marvell/armada/a8k/common/include/
A Da8k_plat_def.h184 DRAM_0_TID = 0x03, enumerator
/trusted-firmware-a/drivers/marvell/
A Dccu.c59 #define IS_DRAM_TARGET(tgt) ((((tgt) == DRAM_0_TID) || \

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