Home
last modified time | relevance | path

Searched refs:GICC_CTLR (Results 1 – 16 of 16) sorted by relevance

/trusted-firmware-a/drivers/arm/gic/v2/
A Dgicv2_private.h62 return mmio_read_32(base + GICC_CTLR); in gicc_read_ctlr()
116 mmio_write_32(base + GICC_CTLR, val); in gicc_write_ctlr()
/trusted-firmware-a/plat/amlogic/common/include/
A Dplat_macros.S41 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/nvidia/tegra/include/
A Dplat_macros.S39 ldr w10, [x16, #GICC_CTLR]
/trusted-firmware-a/plat/xilinx/zynqmp/aarch64/
A Dzynqmp_helpers.S35 str w0, [x1, #GICC_CTLR]
/trusted-firmware-a/plat/hisilicon/hikey/include/
A Dplat_macros.S44 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dplat_macros.S44 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/renesas/common/include/
A Dplat_macros.S39 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/mediatek/mt6795/include/
A Dplat_macros.S36 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/mediatek/mt8173/include/
A Dplat_macros.S42 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/mediatek/mt8183/include/
A Dplat_macros.S42 ldr w10, [x27, #GICC_CTLR]
/trusted-firmware-a/plat/qti/common/inc/aarch64/
A Dplat_macros.S78 ldr w10, [x27, #GICC_CTLR]
/trusted-firmware-a/plat/xilinx/versal/include/
A Dplat_macros.S69 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/include/plat/arm/common/aarch64/
A Darm_macros.S69 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/include/plat/marvell/armada/common/aarch64/
A Dmarvell_macros.S78 ldr w10, [x17, #GICC_CTLR]
/trusted-firmware-a/plat/rockchip/common/include/
A Dplat_macros.S77 ldr w10, [x27, #GICC_CTLR]
/trusted-firmware-a/include/drivers/arm/
A Dgicv2.h58 #define GICC_CTLR U(0x0) macro

Completed in 10 milliseconds