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Searched refs:GICD_OFFSET (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a/drivers/arm/gic/v3/
A Dgicv3_private.h42 #define GICD_OFFSET(REG, id) \ macro
58 #define GICD_OFFSET(REG, id) \ macro
70 mmio_read_32((base) + GICD_OFFSET(REG, (id)))
79 mmio_write_32((base) + GICD_OFFSET(REG, (id)), (val))
90 ((mmio_read_32((base) + GICD_OFFSET(REG, (id))) >> \
95 mmio_setbits_32((base) + GICD_OFFSET(REG, (id)), \
100 mmio_clrbits_32((base) + GICD_OFFSET(REG, (id)), \
105 mmio_write_32((base) + GICD_OFFSET(REG, (id)), \
A Dgicdv3_helpers.c28 mmio_clrsetbits_32(base + GICD_OFFSET(ICFG, id), in gicd_set_icfgr()
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/
A Dchange-log.md.txt1453 - Limit SPI ID to avoid misjudgement in GICD_OFFSET()
/trusted-firmware-a/docs/
A Dchange-log.md1453 - Limit SPI ID to avoid misjudgement in GICD_OFFSET()

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