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Searched refs:GICR_IGROUPR0 (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a/plat/mediatek/common/drivers/gic600/
A Dmt_gic_v3.c86 mmio_write_32(gicr_base + GICR_IGROUPR0, ~0U); in mt_gic_rdistif_init()
103 gic_data.saved_group = mmio_read_32(gicr_base + GICR_IGROUPR0); in mt_gic_rdistif_save()
120 mmio_write_32(gicr_base + GICR_IGROUPR0, gic_data.saved_group); in mt_gic_rdistif_restore()
137 mmio_write_32(gicr_base + GICR_IGROUPR0, gic_data.saved_group); in mt_gic_rdistif_restore_all()
/trusted-firmware-a/plat/mediatek/mt8183/
A Dplat_mt_gic.c91 mmio_write_32(gicr_base + GICR_IGROUPR0, ~0U); in mt_gic_rdistif_init()
118 gic_data.saved_group = mmio_read_32(gicr_base + GICR_IGROUPR0); in mt_gic_rdistif_save()
135 mmio_write_32(gicr_base + GICR_IGROUPR0, gic_data.saved_group); in mt_gic_rdistif_restore()
/trusted-firmware-a/include/drivers/arm/
A Dgicv3.h168 #define GICR_IGROUPR0 (GICR_SGIBASE_OFFSET + U(0x80)) macro
181 #define GICR_IGROUPR GICR_IGROUPR0
/trusted-firmware-a/drivers/arm/gic/v3/
A Dgicv3_private.h455 return mmio_read_32(base + GICR_IGROUPR0); in gicr_read_igroupr0()
460 mmio_write_32(base + GICR_IGROUPR0, val); in gicr_write_igroupr0()

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