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Searched refs:MC_SMMU_CONFIG_0 (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/nvidia/tegra/drivers/memctrl/
A Dmemctrl_v1.c55 (void)tegra_mc_read_32(MC_SMMU_CONFIG_0); /* read to flush writes */ in tegra_memctrl_setup()
59 tegra_mc_write_32(MC_SMMU_CONFIG_0, in tegra_memctrl_setup()
61 (void)tegra_mc_read_32(MC_SMMU_CONFIG_0); /* read to flush writes */ in tegra_memctrl_setup()
/trusted-firmware-a/plat/nvidia/tegra/include/drivers/
A Dmemctrl_v1.h15 #define MC_SMMU_CONFIG_0 0x10U macro

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