Home
last modified time | relevance | path

Searched refs:MIDR_PN_MASK (Results 1 – 11 of 11) sorted by relevance

/trusted-firmware-a/include/lib/cpus/aarch32/
A Dcpu_macros.S17 (MIDR_PN_MASK << MIDR_PN_SHIFT)
225 ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/trusted-firmware-a/lib/cpus/aarch64/
A Dcpuamu.c26 (MIDR_PN_MASK << MIDR_PN_SHIFT); in midr_match()
/trusted-firmware-a/include/lib/cpus/aarch64/
A Dcpu_macros.S14 (MIDR_PN_MASK << MIDR_PN_SHIFT)
302 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/trusted-firmware-a/plat/imx/common/
A Dimx8_helpers.S34 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/trusted-firmware-a/plat/rockchip/common/aarch64/
A Dplat_helpers.S37 cmp w0, #((CORTEX_A72_MIDR >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/trusted-firmware-a/plat/renesas/common/aarch64/
A Dplat_helpers.S353 cmp w1, #((CORTEX_A57_MIDR >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/trusted-firmware-a/plat/nvidia/tegra/common/aarch64/
A Dtegra_helpers.S65 mov x1, #(MIDR_PN_MASK << MIDR_PN_SHIFT)
/trusted-firmware-a/plat/renesas/rzg/
A Dbl2_plat_setup.c711 midr = reg & (MIDR_PN_MASK << MIDR_PN_SHIFT); in bl2_el3_early_platform_setup()
/trusted-firmware-a/include/arch/aarch32/
A Darch.h21 #define MIDR_PN_MASK U(0xfff) macro
/trusted-firmware-a/plat/renesas/rcar/
A Dbl2_plat_setup.c851 midr = reg & (MIDR_PN_MASK << MIDR_PN_SHIFT); in bl2_el3_early_platform_setup()
/trusted-firmware-a/include/arch/aarch64/
A Darch.h24 #define MIDR_PN_MASK U(0xfff) macro

Completed in 19 milliseconds