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Searched refs:MP0_DCM_CFG0 (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/mediatek/mt8192/drivers/dcm/
A Dmtk_dcm_utils.c106 ret &= ((mmio_read_32(MP0_DCM_CFG0) & in dcm_mp_cpusys_top_apb_dcm_is_on()
123 mmio_clrsetbits_32(MP0_DCM_CFG0, in dcm_mp_cpusys_top_apb_dcm()
134 mmio_clrsetbits_32(MP0_DCM_CFG0, in dcm_mp_cpusys_top_apb_dcm()
496 ret &= ((mmio_read_32(MP0_DCM_CFG0) & in dcm_mp_cpusys_top_mp0_qdcm_is_on()
510 mmio_clrsetbits_32(MP0_DCM_CFG0, in dcm_mp_cpusys_top_mp0_qdcm()
518 mmio_clrsetbits_32(MP0_DCM_CFG0, in dcm_mp_cpusys_top_mp0_qdcm()
A Dmtk_dcm_utils.h32 #define MP0_DCM_CFG0 (MP_CPUSYS_TOP_BASE + 0x4880) macro

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