MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON (reference) in projects: trusted-firmware-a

Searched refs:MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/mediatek/mt8195/drivers/dcm/
A D	mtk_dcm_utils.c	`238 #define MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON (BIT(24) \| \ macro 249 (unsigned int) MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON); in dcm_mp_cpusys_top_cpu_pll_div_0_dcm_is_on() 260 MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON); in dcm_mp_cpusys_top_cpu_pll_div_0_dcm()`
/trusted-firmware-a/plat/mediatek/mt8192/drivers/dcm/
A D	mtk_dcm_utils.c	`231 #define MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON (BIT(11)) macro 240 (unsigned int) MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON); in dcm_mp_cpusys_top_cpu_pll_div_0_dcm_is_on() 251 MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON); in dcm_mp_cpusys_top_cpu_pll_div_0_dcm()`

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