Searched refs:MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK (Results 1 – 2 of 2) sorted by relevance
269 #define MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK (BIT(24) | \ macro281 MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK) == in dcm_mp_cpusys_top_cpu_pll_div_1_dcm_is_on()292 MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()297 MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
260 #define MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK (BIT(11)) macro269 MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK) == in dcm_mp_cpusys_top_cpu_pll_div_1_dcm_is_on()280 MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()285 MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
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