Searched refs:MTK_PWR_LVL0 (Results 1 – 2 of 2) sorted by relevance
/trusted-firmware-a/plat/mediatek/mt8173/ |
A D | plat_pm.c | 32 #define MTK_PWR_LVL0 0 macro 37 #define MTK_CORE_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL0] 52 MTK_LOCAL_STATE_RET, MTK_PWR_LVL0, PSTATE_TYPE_STANDBY), 55 MTK_LOCAL_STATE_OFF, MTK_PWR_LVL0, PSTATE_TYPE_POWERDOWN), 340 spm_mcdi_prepare_for_off_state(mpidr, MTK_PWR_LVL0); in plat_power_domain_suspend() 406 if (state->pwr_domain_state[MTK_PWR_LVL0] == MTK_LOCAL_STATE_RET) in plat_power_domain_suspend_finish() 426 spm_mcdi_finish_for_on_state(mpidr, MTK_PWR_LVL0); in plat_power_domain_suspend_finish() 490 req_state->pwr_domain_state[MTK_PWR_LVL0] = in plat_validate_power_state()
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/trusted-firmware-a/plat/mediatek/mt8183/ |
A D | plat_pm.c | 76 #define MTK_PWR_LVL0 0 macro 81 #define MTK_CORE_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL0] 96 MTK_LOCAL_STATE_RET, MTK_PWR_LVL0, PSTATE_TYPE_STANDBY), 99 MTK_LOCAL_STATE_OFF, MTK_PWR_LVL0, PSTATE_TYPE_POWERDOWN), 502 req_state->pwr_domain_state[MTK_PWR_LVL0] = MTK_LOCAL_STATE_RET; in plat_mtk_validate_power_state()
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