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Searched refs:MVEBU_NB_GPIO_REG_BASE (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/marvell/armada/a3k/common/include/
A Da3700_plat_def.h65 #define MVEBU_NB_GPIO_REG_BASE (MVEBU_NB_REGS_BASE + 0x800) macro
72 #define MVEBU_NB_GPIO_SEL_REG (MVEBU_NB_GPIO_REG_BASE + 0x30)
73 #define MVEBU_NB_GPIO_OUTPUT_EN_HIGH_REG (MVEBU_NB_GPIO_REG_BASE + 0x04)
/trusted-firmware-a/plat/marvell/armada/a3k/common/aarch64/
A Da3700_clock.S15 #define MVEBU_TEST_PIN_LATCH_N (MVEBU_NB_GPIO_REG_BASE + 0x8)

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