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Searched refs:NS_DRAM0_BASE (Results 1 – 8 of 8) sorted by relevance

/trusted-firmware-a/plat/rpi/rpi3/include/
A Dplatform_def.h82 #define NS_DRAM0_BASE ULL(0x00400000) macro
100 #define NS_DRAM0_BASE ULL(0x11000000) macro
107 #define PLAT_RPI3_NS_IMAGE_OFFSET NS_DRAM0_BASE
/trusted-firmware-a/plat/qemu/qemu/include/
A Dplatform_def.h83 #define NS_DRAM0_BASE ULL(0x40000000) macro
181 #define NS_IMAGE_OFFSET (NS_DRAM0_BASE + 0x20000000)
265 #define PLAT_QEMU_DT_BASE NS_DRAM0_BASE
/trusted-firmware-a/plat/qemu/qemu_sbsa/include/
A Dplatform_def.h71 #define NS_DRAM0_BASE 0x10000000000ULL macro
157 #define NS_IMAGE_OFFSET (NS_DRAM0_BASE + 0x20000000)
259 #define PLAT_QEMU_DT_BASE NS_DRAM0_BASE
/trusted-firmware-a/plat/qemu/common/
A Dqemu_pm.c114 if ((entrypoint >= NS_DRAM0_BASE) && in qemu_validate_ns_entrypoint()
115 (entrypoint < (NS_DRAM0_BASE + NS_DRAM0_SIZE))) in qemu_validate_ns_entrypoint()
A Dqemu_common.c39 #define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \
/trusted-firmware-a/plat/rpi/common/
A Drpi3_common.c39 #define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/
A Dchange-log.md.txt623 …- (NS_DRAM0_BASE + NS_DRAM0_SIZE) ADDR overflow 32bit ([325716c](https://review.trustedfirmware.or…
/trusted-firmware-a/docs/
A Dchange-log.md623 …- (NS_DRAM0_BASE + NS_DRAM0_SIZE) ADDR overflow 32bit ([325716c](https://review.trustedfirmware.or…

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