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Searched refs:PMCTRL_ACPUCLKDIV (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a/plat/hisilicon/hikey/
A Dhisi_dvfs.c150 write_reg_mask(PMCTRL_ACPUCLKDIV, 0x1 << 8, 0x3 << 8); in acpu_dvfs_syspll_cfg()
161 write_reg_mask(PMCTRL_ACPUCLKDIV, in acpu_dvfs_clk_div_cfg()
169 write_reg_mask(PMCTRL_ACPUCLKDIV, in acpu_dvfs_clk_div_cfg()
178 write_reg_mask(PMCTRL_ACPUCLKDIV, in acpu_dvfs_clk_div_cfg()
347 reg0 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, in acpu_dvfs_freq_ascend()
349 reg1 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, in acpu_dvfs_freq_ascend()
571 reg0 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, in acpu_dvfs_freq_descend()
573 reg1 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, in acpu_dvfs_freq_descend()
/trusted-firmware-a/plat/hisilicon/hikey/include/
A Dhi6220_regs_pmctrl.h18 #define PMCTRL_ACPUCLKDIV (PMCTRL_BASE + 0x104) macro

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