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Searched refs:PU_PGC_UP_TRG (Results 1 – 8 of 8) sorted by relevance

/trusted-firmware-a/plat/imx/imx8m/imx8mm/
A Dgpc.c90 mmio_write_32(IMX_GPC_BASE + PU_PGC_UP_TRG, 0x3fcf); in imx_gpc_init()
/trusted-firmware-a/plat/imx/imx8m/imx8mn/
A Dgpc.c93 mmio_write_32(IMX_GPC_BASE + PU_PGC_UP_TRG, 0x485); in imx_gpc_init()
/trusted-firmware-a/plat/imx/imx8m/imx8mq/include/
A Dgpc_reg.h27 #define PU_PGC_UP_TRG 0xF8 macro
/trusted-firmware-a/plat/imx/imx8m/imx8mn/include/
A Dgpc_reg.h27 #define PU_PGC_UP_TRG 0xF8 macro
/trusted-firmware-a/plat/imx/imx8m/imx8mm/include/
A Dgpc_reg.h27 #define PU_PGC_UP_TRG 0xF8 macro
/trusted-firmware-a/plat/imx/imx8m/imx8mp/
A Dgpc.c202 mmio_setbits_32(IMX_GPC_BASE + PU_PGC_UP_TRG, pwr_domain->pwr_req); in imx_gpc_pm_domain_enable()
205 while (mmio_read_32(IMX_GPC_BASE + PU_PGC_UP_TRG) & pwr_domain->pwr_req) in imx_gpc_pm_domain_enable()
/trusted-firmware-a/plat/imx/imx8m/imx8mp/include/
A Dgpc_reg.h28 #define PU_PGC_UP_TRG 0xD8 macro
/trusted-firmware-a/plat/imx/imx8m/imx8mq/
A Dgpc.c180 mmio_write_32(IMX_GPC_BASE + PU_PGC_UP_TRG, 0x3fcf); in imx_gpc_init()

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