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Searched refs:SPM_CLK_CON (Results 1 – 7 of 7) sorted by relevance

/trusted-firmware-a/plat/mediatek/mt8173/drivers/spm/
A Dspm_mcdi.c239 && ((mmio_read_32(SPM_CLK_CON) & CC_DISABLE_DORM_PWR) == 0)) { in spm_mcdi_cpu_wake_up_event()
243 mmio_read_32(SPM_CLK_CON)); in spm_mcdi_cpu_wake_up_event()
257 mmio_setbits_32(SPM_CLK_CON, CC_DISABLE_DORM_PWR); in spm_mcdi_cpu_wake_up_event()
258 while (mmio_read_32(SPM_CLK_CON) != in spm_mcdi_cpu_wake_up_event()
259 (mmio_read_32(SPM_CLK_CON) | CC_DISABLE_DORM_PWR)) in spm_mcdi_cpu_wake_up_event()
263 mmio_clrbits_32(SPM_CLK_CON, CC_DISABLE_DORM_PWR); in spm_mcdi_cpu_wake_up_event()
264 while (mmio_read_32(SPM_CLK_CON) != in spm_mcdi_cpu_wake_up_event()
265 (mmio_read_32(SPM_CLK_CON) & ~CC_DISABLE_DORM_PWR)) in spm_mcdi_cpu_wake_up_event()
A Dspm.c113 mmio_write_32(SPM_CLK_CON, CC_SYSCLK0_EN_1 | CC_SYSCLK0_EN_0 | in spm_register_init()
171 mmio_clrsetbits_32(SPM_CLK_CON, CC_SRCLKENA_MASK_0, in spm_set_power_control()
290 mmio_clrbits_32(SPM_CLK_CON, CC_DISABLE_DORM_PWR); in spm_kick_pcm_to_run()
294 mmio_clrsetbits_32(SPM_CLK_CON, CC_LOCK_INFRA_DCM, in spm_kick_pcm_to_run()
A Dspm.h59 #define SPM_CLK_CON (SPM_BASE + 0x400) macro
/trusted-firmware-a/plat/mediatek/mt6795/include/
A Dspm.h60 #define SPM_CLK_CON (SPM_BASE + 0x400) macro
/trusted-firmware-a/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_reg.h26 #define SPM_CLK_CON (SPM_BASE + 0x00C) macro
/trusted-firmware-a/plat/mediatek/mt8183/drivers/spm/
A Dspm.h17 #define SPM_CLK_CON (SPM_BASE + 0x00C) macro
/trusted-firmware-a/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_reg.h23 #define SPM_CLK_CON (SPM_BASE + 0x00C) macro

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