Searched refs:TEGRA_FLOWCTRL_BASE (Results 1 – 3 of 3) sorted by relevance
| /trusted-firmware-a/plat/nvidia/tegra/drivers/flowctrl/ |
| A D | flowctrl.c | 27 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU0_CSR),
28 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR),
29 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR + 8),
30 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR + 16)
34 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU0_EVENTS),
35 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU1_EVENTS),
36 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU1_EVENTS + 8),
41 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL),
42 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL + 4),
43 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL + 8),
[all …]
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| /trusted-firmware-a/plat/nvidia/tegra/include/drivers/ |
| A D | flowctrl.h | 75 return mmio_read_32(TEGRA_FLOWCTRL_BASE + off); in tegra_fc_read_32()
80 mmio_write_32(TEGRA_FLOWCTRL_BASE + off, val); in tegra_fc_write_32()
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| /trusted-firmware-a/plat/nvidia/tegra/include/t210/ |
| A D | tegra_def.h | 170 #define TEGRA_FLOWCTRL_BASE U(0x60007000) macro
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