Searched refs:TZC_REGION_S_RDWR (Results 1 – 12 of 12) sorted by relevance
/trusted-firmware-a/drivers/nxp/tzc/ |
A D | plat_tzc400.c | 97 tzc400_reg_list[list_idx].sec_attr = TZC_REGION_S_RDWR; in populate_tzc400_reg_list() 109 tzc400_reg_list[list_idx].sec_attr = TZC_REGION_S_RDWR; in populate_tzc400_reg_list() 118 tzc400_reg_list[list_idx].sec_attr = TZC_REGION_S_RDWR; in populate_tzc400_reg_list() 127 tzc400_reg_list[list_idx].sec_attr = TZC_REGION_S_RDWR; in populate_tzc400_reg_list()
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/trusted-firmware-a/plat/arm/board/juno/ |
A D | juno_security.c | 41 {ARM_AP_TZC_DRAM1_BASE, ARM_AP_TZC_DRAM1_END, TZC_REGION_S_RDWR, 0}, 47 TZC_REGION_S_RDWR, JUNO_VPU_TZC_PROT_ACCESS}, 49 TZC_REGION_S_RDWR, JUNO_VPU_TZC_PRIV_ACCESS},
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/trusted-firmware-a/plat/st/stm32mp1/ |
A D | stm32mp1_security.c | 44 sec_attr = TZC_REGION_S_RDWR; in tzc400_add_region() 113 init_tzc400_begin(TZC_REGION_S_RDWR); in early_init_tzc400()
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A D | stm32mp1_fconf_firewall.c | 44 tzc400_configure_region0(TZC_REGION_S_RDWR, 0); in stm32mp1_arch_security_setup()
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/trusted-firmware-a/include/plat/arm/common/ |
A D | plat_arm.h | 45 TZC_REGION_S_RDWR, 0}, \ 56 {ARM_AP_TZC_DRAM1_BASE, ARM_AP_TZC_DRAM1_END, TZC_REGION_S_RDWR, 0},\ 57 {ARM_EL3_TZC_DRAM1_BASE, ARM_L1_GPT_END, TZC_REGION_S_RDWR, 0}, \ 68 TZC_REGION_S_RDWR, 0}, \
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/trusted-firmware-a/plat/arm/common/ |
A D | arm_tzc_dmc500.c | 58 tzc_dmc500_configure_region0(TZC_REGION_S_RDWR, 0); in arm_tzc_dmc500_setup()
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A D | arm_tzc400.c | 62 tzc400_configure_region0(TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS); in arm_tzc400_setup()
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/trusted-firmware-a/include/drivers/arm/ |
A D | tzc_common.h | 60 #define TZC_REGION_S_RDWR (TZC_REGION_S_RD | TZC_REGION_S_WR) macro
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/trusted-firmware-a/plat/brcm/board/stingray/src/ |
A D | tz_sec.c | 70 tzc400_configure_region0(TZC_REGION_S_RDWR, 0); in bcm_tzc_setup()
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/trusted-firmware-a/drivers/arm/tzc/ |
A D | tzc400.c | 225 assert(sec_attr <= TZC_REGION_S_RDWR); in tzc400_configure_region0() 268 assert(sec_attr <= TZC_REGION_S_RDWR); in tzc400_configure_region()
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/trusted-firmware-a/fdts/ |
A D | stm32mp15-fw-config.dtsi | 72 DDR_SEC_BASE DDR_SEC_SIZE TZC_REGION_S_RDWR 0
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/trusted-firmware-a/plat/arm/board/tc/include/ |
A D | platform_def.h | 268 TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS}, \
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