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Searched refs:UART0_BASE (Results 1 – 20 of 20) sorted by relevance

/trusted-firmware-a/plat/mediatek/mt6795/aarch64/
A Dplat_helpers.S105 mov_imm x0, UART0_BASE
120 mov_imm x1, UART0_BASE
134 mov_imm x0, UART0_BASE
/trusted-firmware-a/plat/qemu/qemu/include/
A Dplatform_def.h194 #define UART0_BASE 0x09000000 macro
199 #define PLAT_QEMU_BOOT_UART_BASE UART0_BASE
/trusted-firmware-a/plat/rockchip/rk3368/
A Drk3368_def.h38 #define UART0_BASE 0xff180000 macro
/trusted-firmware-a/plat/mediatek/mt8195/
A Dbl31_plat_setup.c75 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
/trusted-firmware-a/plat/mediatek/mt8192/
A Dbl31_plat_setup.c76 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
/trusted-firmware-a/plat/qemu/qemu_sbsa/include/
A Dplatform_def.h180 #define UART0_BASE 0x60000000 macro
189 #define PLAT_QEMU_BOOT_UART_BASE UART0_BASE
/trusted-firmware-a/plat/rockchip/rk3288/
A Drk3288_def.h31 #define UART0_BASE 0xff180000 macro
/trusted-firmware-a/plat/mediatek/mt8195/include/
A Dplatform_def.h60 #define UART0_BASE (IO_PHYS + 0x01001100) macro
/trusted-firmware-a/plat/rockchip/rk3328/
A Drk3328_def.h18 #define UART0_BASE 0xff110000 macro
/trusted-firmware-a/plat/mediatek/mt8192/include/
A Dplatform_def.h66 #define UART0_BASE (IO_PHYS + 0x01002000) macro
/trusted-firmware-a/plat/rockchip/px30/
A Dpx30_def.h31 #define UART0_BASE 0xff030000 macro
/trusted-firmware-a/plat/mediatek/mt8183/
A Dbl31_plat_setup.c127 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
/trusted-firmware-a/plat/rockchip/rk3399/include/shared/
A Daddressmap_shared.h21 #define UART0_BASE (MMIO_BASE + 0x07180000) macro
/trusted-firmware-a/plat/mediatek/mt6795/include/
A Dplatform_def.h42 #define UART0_BASE (PERI_BASE + 0x2000) macro
/trusted-firmware-a/plat/rockchip/common/
A Dparams_setup.c83 uart_base = UART0_BASE; in plat_rockchip_dt_process_fdt_uart()
/trusted-firmware-a/plat/rockchip/rk3328/drivers/soc/
A Dsoc.c22 MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
/trusted-firmware-a/plat/mediatek/common/drivers/uart/
A Duart.c13 UART0_BASE,
/trusted-firmware-a/plat/rockchip/rk3288/drivers/soc/
A Dsoc.c37 MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
/trusted-firmware-a/plat/mediatek/mt8183/include/
A Dplatform_def.h99 #define UART0_BASE (IO_PHYS + 0x01002000) macro
/trusted-firmware-a/plat/rockchip/rk3368/drivers/soc/
A Dsoc.c33 MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,

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