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Searched refs:UFS_SYS_HC_LP_CTRL_REG (Results 1 – 3 of 3) sorted by relevance

/trusted-firmware-a/plat/hisilicon/hikey960/
A Dhikey960_bl1_setup.c132 mmio_setbits_32(UFS_SYS_HC_LP_CTRL_REG, BIT_SYSCTRL_PWR_READY); in hikey960_ufs_reset()
154 mmio_clrbits_32(UFS_SYS_HC_LP_CTRL_REG, BIT_SYSCTRL_LP_ISOL_EN); in hikey960_ufs_reset()
A Dhikey960_bl2_setup.c107 mmio_setbits_32(UFS_SYS_HC_LP_CTRL_REG, BIT_SYSCTRL_PWR_READY); in hikey960_ufs_reset()
129 mmio_clrbits_32(UFS_SYS_HC_LP_CTRL_REG, BIT_SYSCTRL_LP_ISOL_EN); in hikey960_ufs_reset()
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dhi3660.h320 #define UFS_SYS_HC_LP_CTRL_REG (UFS_SYS_REG_BASE + 0x00C) macro

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