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Searched refs:UFS_SYS_UFS_SYSCTRL_REG (Results 1 – 3 of 3) sorted by relevance

/trusted-firmware-a/plat/hisilicon/hikey960/
A Dhikey960_bl1_setup.c119 mmio_clrbits_32(UFS_SYS_UFS_SYSCTRL_REG, BIT_UFS_REFCLK_SRC_SE1); in hikey960_ufs_reset()
149 mmio_setbits_32(UFS_SYS_UFS_SYSCTRL_REG, MASK_UFS_SYSCTRL_BYPASS); in hikey960_ufs_reset()
A Dhikey960_bl2_setup.c94 mmio_clrbits_32(UFS_SYS_UFS_SYSCTRL_REG, BIT_UFS_REFCLK_SRC_SE1); in hikey960_ufs_reset()
124 mmio_setbits_32(UFS_SYS_UFS_SYSCTRL_REG, MASK_UFS_SYSCTRL_BYPASS); in hikey960_ufs_reset()
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dhi3660.h326 #define UFS_SYS_UFS_SYSCTRL_REG (UFS_SYS_REG_BASE + 0x05C) macro

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