Searched refs:_base (Results 1 – 5 of 5) sorted by relevance
91 #define PIN(_id, _flag, _bit, _base, _offset) { \ argument95 .base = _base, \
60 #define get_gate_keeper_os(_base) ((_tzc400_read_gate_keeper(_base) >> \ argument
126 uint64\_t tzdram\_base;132 uint64\_t boot\_profiler\_shmem\_base;
7208 region of memory identified by \sphinxcode{\sphinxupquote{mem\_base}} and \sphinxcode{\sphinxupquot…7214 \sphinxcode{\sphinxupquote{mem\_base}} and \sphinxcode{\sphinxupquote{mem\_size}} fits into a \sphi…15566 GICv3 properties: hw\_config.gicv3\_config.gicr\_base33582 The address ns\_bl1u\_base\_address is the value of NS\_BL1U\_BASE \sphinxhyphen{} 0x8000000.33583 In the same way, the address ns\_bl2u\_base\_address is the value of34000 The address ns\_bl1u\_base\_address is the value of NS\_BL1U\_BASE.34001 In the same way, the address ns\_bl2u\_base\_address is the value of38014 uint64\_t tzdram\_base;38020 uint64\_t boot\_profiler\_shmem\_base;
Completed in 101 milliseconds