| /trusted-firmware-a/services/std_svc/spm_mm/ |
| A D | spm_mm_xlat.c | 57 unsigned int access = (attributes & MM_SP_MEMORY_ATTRIBUTES_ACCESS_MASK) in smc_attr_to_mmap_attr() local
60 if (access == MM_SP_MEMORY_ATTRIBUTES_ACCESS_RW) { in smc_attr_to_mmap_attr()
62 } else if (access == MM_SP_MEMORY_ATTRIBUTES_ACCESS_RO) { in smc_attr_to_mmap_attr()
66 assert(access == MM_SP_MEMORY_ATTRIBUTES_ACCESS_NOACCESS); in smc_attr_to_mmap_attr()
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| /trusted-firmware-a/include/lib/extensions/ |
| A D | ras.h | 45 .access = ERR_ACCESS_SYSREG, \
54 .access = ERR_ACCESS_MEMMAP, \
157 unsigned int access:1; member
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| /trusted-firmware-a/docs/design/ |
| A D | alt-boot-flows.rst | 8 the highest exception level is required. It allows full, direct access to the
27 configured to permit secure access only. This gives full access to the whole
35 - Little-endian data access;
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/design/ |
| A D | alt-boot-flows.rst.txt | 8 the highest exception level is required. It allows full, direct access to the
27 configured to permit secure access only. This gives full access to the whole
35 - Little-endian data access;
|
| /trusted-firmware-a/docs/components/ |
| A D | secure-partition-manager-mm.rst | 413 instruction access permissions.
419 instruction access permissions.
422 instruction access permissions.
668 - Bits[1:0] : Data access permission
670 - b'00 : No access
671 - b'01 : Read-Write access
673 - b'11 : Read-only access
743 - Bits[1:0] : Data access permission
745 - b'00 : No access
746 - b'01 : Read-Write access
[all …]
|
| A D | granule-protection-tables-design.rst | 13 spaces have been added to control memory access for each state. The PAS access
16 .. list-table:: Security states and PAS access rights
48 level 0 table controls access to a relatively large region in memory (block
103 structures, then the library will check the desired memory access layout for
152 ``pas_region_t`` structures containing the desired memory access layout. The
|
| A D | debugfs-design.rst | 73 - This permits direct access to a firmware driver, mainly for test purposes
103 - On concurrent access, a spinlock is implemented in the BL31 service to protect
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/components/ |
| A D | secure-partition-manager-mm.rst.txt | 413 instruction access permissions.
419 instruction access permissions.
422 instruction access permissions.
668 - Bits[1:0] : Data access permission
670 - b'00 : No access
671 - b'01 : Read-Write access
673 - b'11 : Read-only access
743 - Bits[1:0] : Data access permission
745 - b'00 : No access
746 - b'01 : Read-Write access
[all …]
|
| A D | granule-protection-tables-design.rst.txt | 13 spaces have been added to control memory access for each state. The PAS access
16 .. list-table:: Security states and PAS access rights
48 level 0 table controls access to a relatively large region in memory (block
103 structures, then the library will check the desired memory access layout for
152 ``pas_region_t`` structures containing the desired memory access layout. The
|
| A D | debugfs-design.rst.txt | 73 - This permits direct access to a firmware driver, mainly for test purposes
103 - On concurrent access, a spinlock is implemented in the BL31 service to protect
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/plat/arm/tc/ |
| A D | index.rst.txt | 9 loaded by AP BL2 from FIP in flash to SRAM for copying by SCP (SCP has access
27 FIP to SRAM. The SCP has access to AP SRAM. The address and size of SCP_BL2
|
| /trusted-firmware-a/docs/plat/arm/tc/ |
| A D | index.rst | 9 loaded by AP BL2 from FIP in flash to SRAM for copying by SCP (SCP has access
27 FIP to SRAM. The SCP has access to AP SRAM. The address and size of SCP_BL2
|
| /trusted-firmware-a/tools/fiptool/ |
| A D | win_posix.h | 126 inline int access(const char *path, int mode) in access() function
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/threat_model/ |
| A D | threat_model.rst.txt | 62 | ``DF3`` | | Debug and trace IP on a platform can allow access |
132 | ``AppDebug`` | | Physical attacker using debug signals to access |
135 | ``PhysicalAccess``| | Physical attacker having access to external device |
232 that require physical access are unlikely in server environments while
249 | | storage. It is possible for an attacker to access|
365 | ``Threat`` | | **An attacker with physical access can execute |
505 | | | Secure and non-secure clients access TF-A services |
686 | | access sensitive data or execute arbitrary |
691 | | normal world to access sensitive data or even |
718 | | access permissions. Memory configurations are |
[all …]
|
| /trusted-firmware-a/docs/threat_model/ |
| A D | threat_model.rst | 62 | ``DF3`` | | Debug and trace IP on a platform can allow access |
132 | ``AppDebug`` | | Physical attacker using debug signals to access |
135 | ``PhysicalAccess``| | Physical attacker having access to external device |
232 that require physical access are unlikely in server environments while
249 | | storage. It is possible for an attacker to access|
365 | ``Threat`` | | **An attacker with physical access can execute |
505 | | | Secure and non-secure clients access TF-A services |
686 | | access sensitive data or execute arbitrary |
691 | | normal world to access sensitive data or even |
718 | | access permissions. Memory configurations are |
[all …]
|
| /trusted-firmware-a/plat/nvidia/tegra/include/t186/ |
| A D | tegra_mc_def.h | 334 #define mc_make_sec_cfg(off, ns, ovrrd, access) \ argument
341 .override_enable = OVERRIDE_ ## access \
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/plat/marvell/armada/misc/ |
| A D | mvebu-io-win.rst.txt | 14 - **0x2** = SPI direct access
|
| /trusted-firmware-a/docs/plat/marvell/armada/misc/ |
| A D | mvebu-io-win.rst | 14 - **0x2** = SPI direct access
|
| /trusted-firmware-a/docs/security_advisories/ |
| A D | security-advisory-tfv-3.rst | 29 contains flags to control data access permissions (``MT_RO``/``MT_RW``) and
47 permissions separately to data access permissions. All RO normal memory regions
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/security_advisories/ |
| A D | security-advisory-tfv-3.rst.txt | 29 contains flags to control data access permissions (``MT_RO``/``MT_RW``) and
47 permissions separately to data access permissions. All RO normal memory regions
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/plat/arm/ |
| A D | arm-build-options.rst.txt | 13 - ``ARM_CONFIG_CNTACR``: boolean option to unlock access to the ``CNTBase<N>``
17 kernel). Default is true (access to the frame is allowed).
40 MPIDR is set and access the bit-fields in MPIDR accordingly. Default value of
|
| /trusted-firmware-a/docs/plat/arm/ |
| A D | arm-build-options.rst | 13 - ``ARM_CONFIG_CNTACR``: boolean option to unlock access to the ``CNTBase<N>``
17 kernel). Default is true (access to the frame is allowed).
40 MPIDR is set and access the bit-fields in MPIDR accordingly. Default value of
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/plat/ |
| A D | rz-g2.rst.txt | 82 behind using direct shared memory access to BOOT_KIND_BASE _and_
162 - Boot the board in Mini-monitor mode and enable access to the
|
| A D | rcar-gen3.rst.txt | 87 behind using direct shared memory access to BOOT_KIND_BASE _and_
189 - Boot the board in Mini-monitor mode and enable access to the
|
| /trusted-firmware-a/docs/plat/ |
| A D | rz-g2.rst | 82 behind using direct shared memory access to BOOT_KIND_BASE _and_
162 - Boot the board in Mini-monitor mode and enable access to the
|