Searched refs:alignment (Results 1 – 15 of 15) sorted by relevance
48 /* Ensure 8-byte alignment for descriptors and ensure inclusion */55 /* Ensure 8-byte alignment for descriptors and ensure inclusion */63 * Ensure 8-byte alignment for cpu_ops so that its fields are also74 * security. GOT is a table of addresses so ensure 8-byte alignment.104 * individual permissions to them, so the actual alignment needed is 4K.135 * this section correctly. Ensure 8-byte alignment so that the fields of
28 unsigned long alignment; member
214 Sample Calculation for L0 memory size and alignment226 Sample calculation for L1 table size and alignment
343 /* Save link register whilst maintaining stack alignment */
659 There are no alignment restrictions on the Base Address. The permission732 The alignment of the Base Address must be greater than or equal to the size
249 bit. Alignment and stack alignment checking is enabled by setting the1560 End address of a given section named ``<SECTION>``. If there is an alignment1569 rounding up due to some alignment constraint.1574 alignment constraint on the section's end address then ``__<SECTION>_SIZE__``1582 rounding up due to some alignment constraint. In other words,2272 The 2KB alignment for the exception vectors is an architectural
401 % is hopeless for multirow anyhow, it makes baseline alignment strictly
751 \newlabel{process/coding-style:alignment}{{3.4.12}{119}{Alignment}{subsection.3.4.12}{}}753 \newlabel{process/coding-style:switch-statement-alignment}{{3.4.12}{119}{Switch Statement Alignment…755 \newlabel{process/coding-style:pointer-alignment}{{3.4.12}{120}{Pointer Alignment}{subsubsection*.2…
11161 \label{\detokenize{process/coding-style:alignment}}11188 \label{\detokenize{process/coding-style:pointer-alignment}}24785 \subsubsection{Sample Calculation for L0 memory size and alignment}24801 \subsubsection{Sample calculation for L1 table size and alignment}29294 rounding up due to some alignment constraint.29313 rounding up due to some alignment constraint. In other words,30173 The 2KB alignment for the exception vectors is an architectural58074 Fixed incorrect alignment of TZDRAM base address58847 Reduce space lost to object alignment62078 Code hygiene changes and alignment with MISRA guideline:[all …]
1926 - Fixed incorrect alignment of TZDRAM base address2159 - Reduce space lost to object alignment2799 alignment is now supported on the Juno platform. When `USE_ROMLIB` is set3139 - Code hygiene changes and alignment with MISRA C-2012 guideline with fixes3362 - Code hygiene changes and alignment with MISRA guideline:3412 alignment needed between memory attributes and attributes specified in3782 to leave EL3 for a lower EL. This gives better alignment with the Arm ARM4103 - Better alignment with version 1.0 of the PSCI specification.
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