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/trusted-firmware-a/lib/libfdt/
A Dfdt_sw.c276 static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) in fdt_find_add_string_() argument
282 *allocated = 0; in fdt_find_add_string_()
288 *allocated = 1; in fdt_find_add_string_()
297 int allocated; in fdt_property_placeholder() local
303 allocated = 1; in fdt_property_placeholder()
306 nameoff = fdt_find_add_string_(fdt, name, &allocated); in fdt_property_placeholder()
313 if (allocated) in fdt_property_placeholder()
A Dfdt_rw.c127 static int fdt_find_add_string_(void *fdt, const char *s, int *allocated) in fdt_find_add_string_() argument
136 *allocated = 0; in fdt_find_add_string_()
149 *allocated = 1; in fdt_find_add_string_()
209 int allocated; in fdt_add_property_() local
214 namestroff = fdt_find_add_string_(fdt, name, &allocated); in fdt_add_property_()
224 if (!can_assume(NO_ROLLBACK) && allocated) in fdt_add_property_()
/trusted-firmware-a/docs/design/
A Dpsci-pd-tree.rst126 power domain. MPIDRs could be allocated in any manner and will not be used to
131 which is not allocated or corresponds to an absent core. The semantics of this
143 relationship allows the core nodes to be allocated in a separate array
150 For platforms where the number of allocated MPIDRs is equal to the number of
157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
166 disabled or absent. Entries will not be allocated in the tree for these
171 is equal to the size of the range of MPIDRs allocated. This approach will
172 lead to memory wastage since entries will be allocated in the tree but will
A Dauth-framework.rst138 #. Identify the image and load it in the allocated memory.
542 obtained from either the image itself or its parent image. The memory allocated
545 to have memory allocated for them separately where they can be stored. This
546 memory must be statically allocated by the platform port.
707 In the ``tbbr_cot*.c`` file, a set of buffers are allocated to store the parameters
A Dfirmware-design.rst900 This structure is allocated in a special ELF section ``rt_svc_descs``, enabling
1154 BL31 by issuing an SMC, using a Function ID allocated to the SPD. On
1528 corresponding sections need to be allocated and initialized at run-time.
1625 mutable data. Its ``.data`` section (i.e. its allocated read-write data) must be
2030 mismatched attributes from various CPUs are allocated in a coherent memory
2052 The below sections analyze the data structures allocated in the coherent memory
2060 structure is allocated in the coherent memory region in TF-A because it can be
2106 The bakery lock data structure ``bakery_lock_t`` is allocated in coherent memory
2117 * Bits[1 - 15] : number. This is the bakery number allocated.
2146 for other cores by using the total size allocated for the bakery_lock section
[all …]
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/design/
A Dpsci-pd-tree.rst.txt126 power domain. MPIDRs could be allocated in any manner and will not be used to
131 which is not allocated or corresponds to an absent core. The semantics of this
143 relationship allows the core nodes to be allocated in a separate array
150 For platforms where the number of allocated MPIDRs is equal to the number of
157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
166 disabled or absent. Entries will not be allocated in the tree for these
171 is equal to the size of the range of MPIDRs allocated. This approach will
172 lead to memory wastage since entries will be allocated in the tree but will
A Dauth-framework.rst.txt138 #. Identify the image and load it in the allocated memory.
542 obtained from either the image itself or its parent image. The memory allocated
545 to have memory allocated for them separately where they can be stored. This
546 memory must be statically allocated by the platform port.
707 In the ``tbbr_cot*.c`` file, a set of buffers are allocated to store the parameters
A Dfirmware-design.rst.txt900 This structure is allocated in a special ELF section ``rt_svc_descs``, enabling
1154 BL31 by issuing an SMC, using a Function ID allocated to the SPD. On
1528 corresponding sections need to be allocated and initialized at run-time.
1625 mutable data. Its ``.data`` section (i.e. its allocated read-write data) must be
2030 mismatched attributes from various CPUs are allocated in a coherent memory
2052 The below sections analyze the data structures allocated in the coherent memory
2060 structure is allocated in the coherent memory region in TF-A because it can be
2106 The bakery lock data structure ``bakery_lock_t`` is allocated in coherent memory
2117 * Bits[1 - 15] : number. This is the bakery number allocated.
2146 for other cores by using the total size allocated for the bakery_lock section
[all …]
/trusted-firmware-a/docs/components/spd/
A Dtrusty-dispatcher.rst22 size allocated to trusty. If the platform does not provide this
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/components/spd/
A Dtrusty-dispatcher.rst.txt22 size allocated to trusty. If the platform does not provide this
/trusted-firmware-a/plat/nvidia/tegra/scat/
A Dbl31.scat179 * the remaining cache lines are allocated by the linker script
207 * the remaining memory for other CPU's is allocated by the
/trusted-firmware-a/docs/components/
A Dffa-manifest-binding.rst40 - Pre-allocated partition ID.
44 - Pre-allocated ID that could be used in memory management transactions.
A Dxlat-tables-lib-v2-design.rst98 here, a level-3 table will need to be allocated on the fly and the level-2
135 may be explicitly allocated and initialized using the
156 allocated. For example, if the initial lookup level is 1, this parameter would
213 does not fit within this pre-allocated pool of memory.
A Dromlib-design.rst121 On Arm platforms a section of 1 page (0x1000) is allocated at the top of SRAM.
A Dsecure-partition-manager-mm.rst213 is statically allocated by the SPM and is expected to be either implicitly known
614 All memory required by the Secure Partition is allocated upfront in the SPM,
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/components/
A Dffa-manifest-binding.rst.txt40 - Pre-allocated partition ID.
44 - Pre-allocated ID that could be used in memory management transactions.
A Dxlat-tables-lib-v2-design.rst.txt98 here, a level-3 table will need to be allocated on the fly and the level-2
135 may be explicitly allocated and initialized using the
156 allocated. For example, if the initial lookup level is 1, this parameter would
213 does not fit within this pre-allocated pool of memory.
A Dromlib-design.rst.txt121 On Arm platforms a section of 1 page (0x1000) is allocated at the top of SRAM.
A Dsecure-partition-manager-mm.rst.txt213 is statically allocated by the SPM and is expected to be either implicitly known
614 All memory required by the Secure Partition is allocated upfront in the SPM,
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/getting_started/
A Drt-svc-writers-guide.rst.txt38 are allocated a range of of OENs. The OEN must be interpreted in conjunction
41 Owning Entities only have allocated ranges for Fast calls: Yielding calls are
A Dporting-guide.rst.txt155 states for each level may be sparsely allocated between 0 and this value
187 excluding any data section allocated at runtime) can occupy.
219 (i.e. excluding any data section allocated at runtime) can occupy. This
452 Defines the maximum number of translation tables that are allocated by the
532 much memory is allocated for PL061 GPIO controllers. The default value is
541 control how much memory is allocated for partition entries. The default
951 has been allocated for the current CPU. For BL images that only require a
953 of the stack allocated to each CPU is specified by the platform defined
969 has been allocated for the current CPU. For BL images that only require a
971 of the stack allocated to each CPU is specified by the platform defined
[all …]
/trusted-firmware-a/docs/getting_started/
A Drt-svc-writers-guide.rst38 are allocated a range of of OENs. The OEN must be interpreted in conjunction
41 Owning Entities only have allocated ranges for Fast calls: Yielding calls are
A Dporting-guide.rst155 states for each level may be sparsely allocated between 0 and this value
187 excluding any data section allocated at runtime) can occupy.
219 (i.e. excluding any data section allocated at runtime) can occupy. This
452 Defines the maximum number of translation tables that are allocated by the
532 much memory is allocated for PL061 GPIO controllers. The default value is
541 control how much memory is allocated for partition entries. The default
951 has been allocated for the current CPU. For BL images that only require a
953 of the stack allocated to each CPU is specified by the platform defined
969 has been allocated for the current CPU. For BL images that only require a
971 of the stack allocated to each CPU is specified by the platform defined
[all …]
/trusted-firmware-a/docs/plat/
A Drpi3.rst143 Considering the 128 MiB allocated to the GPU and the 16 MiB allocated for
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/plat/
A Drpi3.rst.txt143 Considering the 128 MiB allocated to the GPU and the 16 MiB allocated for

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