| /trusted-firmware-a/bl32/tsp/ |
| A D | tsp_private.h | 71 uint64_t arg5,
79 uint64_t arg5,
88 uint64_t arg5,
119 uint64_t arg5,
128 uint64_t arg5,
137 uint64_t arg5,
146 uint64_t arg5,
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| A D | tsp_main.c | 53 uint64_t arg5, in set_smc_args() argument
71 write_sp_arg(pcpu_smc_args, TSP_ARG5, arg5); in set_smc_args()
175 uint64_t arg5, in tsp_cpu_off_main() argument
218 uint64_t arg5, in tsp_cpu_suspend_main() argument
260 uint64_t arg5, in tsp_cpu_resume_main() argument
298 uint64_t arg5, in tsp_system_off_main() argument
330 uint64_t arg5, in tsp_system_reset_main() argument
364 uint64_t arg5, in tsp_smc_handler() argument
448 uint64_t arg5, in tsp_abort_smc_handler() argument
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| /trusted-firmware-a/services/std_svc/rmmd/trp/ |
| A D | trp_main.c | 31 uint64_t arg5, in set_smc_args() argument
49 write_trp_arg(pcpu_smc_args, TRP_ARG5, arg5); in set_smc_args()
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| /trusted-firmware-a/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| A D | mce.c | 164 uint64_t ret64 = 0, arg3, arg4, arg5; in mce_command_handler() local
188 arg5 = read_ctx_reg(gp_regs, CTX_GPREG_X6); in mce_command_handler()
192 (uint32_t)arg4, (uint8_t)arg5); in mce_command_handler()
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| /trusted-firmware-a/include/export/common/ |
| A D | ep_info_exp.h | 84 uint64_t arg5; member
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| /trusted-firmware-a/plat/nvidia/tegra/common/ |
| A D | tegra_bl31_setup.c | 209 args->arg3 = bl32_args.arg5; in plat_trusty_set_boot_args()
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| /trusted-firmware-a/plat/mediatek/mt6795/ |
| A D | bl31_plat_setup.c | 229 bl33_image_ep_info.args.arg5 = pmtk_bl_param->bootarg_size; in bl31_early_platform_setup2()
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| /trusted-firmware-a/plat/xilinx/versal/pm_service/ |
| A D | pm_api_sys.c | 68 #define PM_PACK_PAYLOAD6(pl, mid, flag, arg0, arg1, arg2, arg3, arg4, arg5) { \ argument
69 pl[5] = (uint32_t)(arg5); \
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| /trusted-firmware-a/plat/xilinx/zynqmp/pm_service/ |
| A D | pm_api_sys.c | 63 #define PM_PACK_PAYLOAD6(pl, arg0, arg1, arg2, arg3, arg4, arg5) { \ argument
64 pl[5] = (uint32_t)(arg5); \
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| /trusted-firmware-a/docs/process/ |
| A D | coding-guidelines.rst | 435 u_register_t arg5;
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| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/process/ |
| A D | coding-guidelines.rst.txt | 435 u_register_t arg5;
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| /trusted-firmware-a/docs/build/TF-A_2.5/ |
| A D | searchindex.js | 1 …1:[32,33,38,53,123,124],arg2:[32,33,38,53,123,124],arg3:[53,123],arg4:123,arg5:123,arg6:123,arg7:1…
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| /trusted-firmware-a/docs/build/latex/ |
| A D | trustedfirmware-a.tex | 12070 \PYG{+w}{ }\PYG{n}{u\PYGZus{}register\PYGZus{}t}\PYG{+w}{ }\PYG{n}{arg5}\PYG{p}{;}
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