Searched refs:bl1_tzram_layout (Results 1 – 10 of 10) sorted by relevance
| /trusted-firmware-a/plat/qemu/common/ |
| A D | qemu_bl1_setup.c | 18 static meminfo_t bl1_tzram_layout; variable
23 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
35 bl1_tzram_layout.total_base = BL_RAM_BASE; in bl1_early_platform_setup()
36 bl1_tzram_layout.total_size = BL_RAM_SIZE; in bl1_early_platform_setup()
52 QEMU_CONFIGURE_BL1_MMU(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
53 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/layerscape/common/ |
| A D | ls_bl1_setup.c | 14 static meminfo_t bl1_tzram_layout; variable
18 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
38 bl1_tzram_layout.total_base = LS_SRAM_BASE; in ls_bl1_early_platform_setup()
39 bl1_tzram_layout.total_size = LS_SRAM_SIZE; in ls_bl1_early_platform_setup()
50 ls_setup_page_tables(bl1_tzram_layout.total_base, in ls_bl1_plat_arch_setup()
51 bl1_tzram_layout.total_size, in ls_bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/rpi/rpi3/ |
| A D | rpi3_bl1_setup.c | 20 static meminfo_t bl1_tzram_layout; variable
24 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
41 bl1_tzram_layout.total_base = BL_RAM_BASE; in bl1_early_platform_setup()
42 bl1_tzram_layout.total_size = BL_RAM_SIZE; in bl1_early_platform_setup()
52 rpi3_setup_page_tables(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
53 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/hisilicon/poplar/ |
| A D | bl1_plat_setup.c | 29 static meminfo_t bl1_tzram_layout; variable
76 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
77 bl1_tzram_layout.total_size = BL1_RW_SIZE; in bl1_early_platform_setup()
85 plat_configure_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
86 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/hisilicon/hikey/ |
| A D | hikey_bl1_setup.c | 30 static meminfo_t bl1_tzram_layout; variable
42 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
55 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
56 bl1_tzram_layout.total_size = BL1_RW_SIZE; in bl1_early_platform_setup()
69 hikey_init_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
70 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /trusted-firmware-a/plat/arm/board/fvp_r/ |
| A D | fvp_r_bl1_setup.c | 27 bl1_tzram_layout.total_base, \
28 bl1_tzram_layout.total_size, \
52 static meminfo_t bl1_tzram_layout; variable
56 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
71 bl1_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl1_early_platform_setup()
72 bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE; in arm_bl1_early_platform_setup()
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| /trusted-firmware-a/plat/arm/common/ |
| A D | arm_bl1_setup.c | 33 bl1_tzram_layout.total_base, \
34 bl1_tzram_layout.total_size, \
58 static meminfo_t bl1_tzram_layout; variable
65 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
83 bl1_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl1_early_platform_setup()
84 bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE; in arm_bl1_early_platform_setup()
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| /trusted-firmware-a/plat/hisilicon/hikey960/ |
| A D | hikey960_bl1_setup.c | 43 static meminfo_t bl1_tzram_layout; variable
66 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
87 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
88 bl1_tzram_layout.total_size = BL1_RW_SIZE; in bl1_early_platform_setup()
101 hikey960_init_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
102 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /trusted-firmware-a/build/qemu/release/bl1/ |
| A D | bl1.map | 1216 .bss.bl1_tzram_layout
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| A D | bl1.dump | 116 000000000e04f710 l O .bss 0000000000000010 bl1_tzram_layout
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