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Searched refs:clk_div (Results 1 – 12 of 12) sorted by relevance

/trusted-firmware-a/drivers/delay_timer/
A Ddelay_timer.c27 (timer_ops->clk_div != 0U) && in udelay()
33 assert(usec < (UINT64_MAX / timer_ops->clk_div)); in udelay()
39 div_round_up((uint64_t)usec * timer_ops->clk_div, in udelay()
78 (ops_ptr->clk_div != 0U) && in timer_init()
A Dgeneric_delay_timer.c36 ops.clk_div = div; in generic_delay_timer_init_args()
/trusted-firmware-a/include/drivers/arm/
A Dsp804_delay_timer.h18 #define sp804_timer_init(base_addr, clk_mult, clk_div) \ argument
23 (clk_div) \
/trusted-firmware-a/drivers/imx/uart/
A Dimx_uart.c24 static struct clk_div_factors clk_div[] = { variable
94 clk_div[clk_idx].fcr_div; in console_imx_uart_core_init()
116 val = ((uart_clk / clk_div[clk_idx].bmr_div) / baud_rate) - 1; in console_imx_uart_core_init()
/trusted-firmware-a/plat/mediatek/mt6795/
A Dplat_delay_timer.c25 .clk_div = SYS_COUNTER_FREQ_IN_MHZ,
/trusted-firmware-a/plat/marvell/armada/common/
A Dplat_delay_timer.c28 .clk_div = SYS_COUNTER_FREQ_IN_MHZ
/trusted-firmware-a/plat/intel/soc/common/
A Dsocfpga_delay_timer.c32 .clk_div = PLAT_SYS_COUNTER_FREQ_IN_MHZ,
/trusted-firmware-a/plat/layerscape/common/
A Dls_timer.c32 .clk_div = 25,
/trusted-firmware-a/plat/nvidia/tegra/common/
A Dtegra_delay_timer.c55 tegra_timer_ops.clk_div = divider; in tegra_delay_timer_init()
/trusted-firmware-a/include/drivers/
A Ddelay_timer.h27 uint32_t clk_div; member
/trusted-firmware-a/drivers/imx/timer/
A Dimx_gpt.c38 .clk_div = SYS_COUNTER_FREQ_IN_MHZ,
/trusted-firmware-a/drivers/nxp/timer/
A Dnxp_timer.c64 ops.clk_div = div; in delay_timer_init_args()

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