Searched refs:cm_write_scr_el3_bit (Results 1 – 9 of 9) sorted by relevance
| /trusted-firmware-a/bl31/ |
| A D | interrupt_mgmt.c | 114 cm_write_scr_el3_bit(security_state, bit_pos, flag); in set_scr_el3_from_rm()
158 cm_write_scr_el3_bit(security_state, bit_pos, flag); in disable_intr_rm_local()
177 cm_write_scr_el3_bit(security_state, bit_pos, flag); in enable_intr_rm_local()
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| /trusted-firmware-a/include/lib/el3_runtime/ |
| A D | context_mgmt.h | 49 void cm_write_scr_el3_bit(uint32_t security_state,
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| /trusted-firmware-a/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 820 void cm_write_scr_el3_bit(uint32_t security_state, in cm_write_scr_el3_bit() function
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| /trusted-firmware-a/docs/design/ |
| A D | interrupt-framework-design.rst | 381 void cm_write_scr_el3_bit(uint32_t security_state,
386 security state of the current CPU. ``cm_write_scr_el3_bit()`` writes a ``0`` or ``1``
389 model using the ``cm_get_scr_el3()`` and ``cm_write_scr_el3_bit()`` APIs.
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| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/design/ |
| A D | interrupt-framework-design.rst.txt | 381 void cm_write_scr_el3_bit(uint32_t security_state,
386 security state of the current CPU. ``cm_write_scr_el3_bit()`` writes a ``0`` or ``1``
389 model using the ``cm_get_scr_el3()`` and ``cm_write_scr_el3_bit()`` APIs.
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| /trusted-firmware-a/docs/build/TF-A_2.5/ |
| A D | searchindex.js | 1 …ontext_by_index:55,cm_set_next_eret_context:40,cm_setup_context:6,cm_write_scr_el3_bit:40,cmake:46…
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| /trusted-firmware-a/build/qemu/release/bl31/ |
| A D | bl31.map | 1175 .text.cm_write_scr_el3_bit
1177 0x000000000e041a4c cm_write_scr_el3_bit
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| A D | bl31.dump | 638 000000000e041a4c g F .text 0000000000000040 cm_write_scr_el3_bit
2735 000000000e041a4c <cm_write_scr_el3_bit>:
6429 e044f28: 17fff2c9 b e041a4c <cm_write_scr_el3_bit>
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| /trusted-firmware-a/build/qemu/release/bl1/ |
| A D | bl1.map | 86 .text.cm_write_scr_el3_bit
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