Searched refs:ctl (Results 1 – 11 of 11) sorted by relevance
/trusted-firmware-a/drivers/st/ddr/ |
A D | stm32mp1_ddr.c | 294 return (uintptr_t)priv->ctl; in get_base_addr() 389 (uintptr_t)&ctl->swctl, mmio_read_32((uintptr_t)&ctl->swctl)); in stm32mp1_start_sw_done() 400 (uintptr_t)&ctl->swctl, mmio_read_32((uintptr_t)&ctl->swctl)); in stm32mp1_wait_sw_done_ack() 536 (uintptr_t)&priv->ctl->dbg1, in stm32mp1_ddr3_dll_off() 597 (uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off() 616 (uintptr_t)&priv->ctl->mstr, in stm32mp1_ddr3_dll_off() 668 (uintptr_t)&priv->ctl->dbg1, in stm32mp1_ddr3_dll_off() 674 stm32mp1_start_sw_done(ctl); in stm32mp1_refresh_disable() 687 stm32mp1_start_sw_done(ctl); in stm32mp1_refresh_restore() 786 (uintptr_t)&priv->ctl->mstr, in stm32mp1_ddr_init() [all …]
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A D | stm32mp1_ram.c | 292 priv->ctl = (struct stm32mp1_ddrctl *)stm32mp_ddrctrl_base(); in stm32mp1_ddr_probe()
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/trusted-firmware-a/bl32/tsp/ |
A D | tsp_timer.c | 20 uint32_t ctl; member 31 uint32_t ctl = 0; in tsp_generic_timer_start() local 38 set_cntp_ctl_enable(ctl); in tsp_generic_timer_start() 39 write_cntps_ctl_el1(ctl); in tsp_generic_timer_start() 77 pcpu_timer_context[linear_id].ctl = read_cntps_ctl_el1(); in tsp_generic_timer_save() 90 write_cntps_ctl_el1(pcpu_timer_context[linear_id].ctl); in tsp_generic_timer_restore()
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/trusted-firmware-a/plat/mediatek/mt6795/ |
A D | plat_pm.c | 84 uint64_t ctl; in mt_save_generic_timer() local 90 : "=&r" (ctl), "=&r" (val) in mt_save_generic_timer() 97 : "=&r" (val), "=&r" (ctl) in mt_save_generic_timer() 104 : "=&r" (val), "=&r" (ctl) in mt_save_generic_timer() 111 uint64_t ctl; in mt_restore_generic_timer() local 117 : "=&r" (ctl), "=&r" (val) in mt_restore_generic_timer() 124 : "=&r" (val), "=&r" (ctl) in mt_restore_generic_timer() 131 : "=&r" (val), "=&r" (ctl) in mt_restore_generic_timer()
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/trusted-firmware-a/fdts/ |
A D | stm32mp15-ddr.dtsi | 11 st,ctl-reg = < 39 st,ctl-timing = < 54 st,ctl-map = < 66 st,ctl-perf = <
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/trusted-firmware-a/plat/mediatek/mt8173/ |
A D | plat_pm.c | 127 uint64_t ctl; in mt_save_generic_timer() local 133 : "=&r" (ctl), "=&r" (val) in mt_save_generic_timer() 140 : "=&r" (val), "=&r" (ctl) in mt_save_generic_timer() 147 : "=&r" (val), "=&r" (ctl) in mt_save_generic_timer() 154 uint64_t ctl; in mt_restore_generic_timer() local 160 : "=&r" (ctl), "=&r" (val) in mt_restore_generic_timer() 167 : "=&r" (val), "=&r" (ctl) in mt_restore_generic_timer() 174 : "=&r" (val), "=&r" (ctl) in mt_restore_generic_timer()
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/trusted-firmware-a/include/drivers/st/ |
A D | stm32mp1_ddr.h | 31 struct stm32mp1_ddrctl *ctl; member
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/trusted-firmware-a/plat/rockchip/rk3399/drivers/dram/ |
A D | suspend.c | 125 static __pmusramfunc void rkclk_ddr_reset(uint32_t channel, uint32_t ctl, in rkclk_ddr_reset() argument 129 ctl &= 0x1; in rkclk_ddr_reset() 132 CRU_SFTRST_DDR_CTRL(channel, ctl) | in rkclk_ddr_reset()
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/trusted-firmware-a/include/drivers/nxp/sd/ |
A D | sd_mmc.h | 288 uint32_t ctl; /* Control register */ member
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/trusted-firmware-a/drivers/nxp/sd/ |
A D | sd_mmc.c | 169 val = esdhc_in32(&mmc->esdhc_regs->ctl) | ESDHC_DCR_SNOOP; in esdhc_init() 170 esdhc_out32(&mmc->esdhc_regs->ctl, val); in esdhc_init()
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/trusted-firmware-a/docs/build/latex/ |
A D | trustedfirmware-a.tex | 28894 \PYG{n}{cntp\PYGZus{}ctl\PYGZus{}el0} \PYG{o}{=} \PYG{l+m+mh}{0x0000000000000000} 28896 \PYG{n}{cntv\PYGZus{}ctl\PYGZus{}el0} \PYG{o}{=} \PYG{l+m+mh}{0x0000000000000000}
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