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Searched refs:divider (Results 1 – 7 of 7) sorted by relevance

/trusted-firmware-a/plat/nvidia/tegra/common/
A Dtegra_delay_timer.c41 uint32_t divider = plat_get_syscnt_freq2(); in tegra_delay_timer_init() local
44 while (((multiplier % 10U) == 0U) && ((divider % 10U) == 0U)) { in tegra_delay_timer_init()
46 divider /= 10U; in tegra_delay_timer_init()
55 tegra_timer_ops.clk_div = divider; in tegra_delay_timer_init()
/trusted-firmware-a/plat/arm/board/arm_fpga/
A Dfpga_bl31_setup.c145 static unsigned int pl011_freq_from_divider(unsigned int divider) in pl011_freq_from_divider() argument
149 freq = divider * FPGA_DEFAULT_BAUDRATE * PL011_OVERSAMPLING; in pl011_freq_from_divider()
182 unsigned int divider; in fpga_get_system_frequency() local
187 divider = mmio_read_32(pl011_base + UARTIBRD); in fpga_get_system_frequency()
188 divider <<= PL011_FRAC_SHIFT; in fpga_get_system_frequency()
189 divider += mmio_read_32(pl011_base + UARTFBRD); in fpga_get_system_frequency()
195 return round_multiple(pl011_freq_from_divider(divider), in fpga_get_system_frequency()
/trusted-firmware-a/plat/xilinx/zynqmp/pm_service/
A Dpm_api_sys.c1027 unsigned int divider) in pm_clock_setdivider() argument
1040 return pm_pll_set_parameter(nid, PM_PLL_PARAM_FBDIV, divider); in pm_clock_setdivider()
1047 if (div0 == (divider & div0)) { in pm_clock_setdivider()
1049 val = divider & ~div0; in pm_clock_setdivider()
1050 } else if (div1 == (divider & div1)) { in pm_clock_setdivider()
1052 val = (divider & ~div1) >> 16; in pm_clock_setdivider()
1073 unsigned int *divider) in pm_clock_getdivider() argument
1083 return pm_pll_get_parameter(nid, PM_PLL_PARAM_FBDIV, divider); in pm_clock_getdivider()
1097 *divider = val; in pm_clock_getdivider()
1107 *divider |= val << 16; in pm_clock_getdivider()
A Dpm_api_sys.h148 unsigned int divider);
150 unsigned int *divider);
/trusted-firmware-a/plat/xilinx/versal/pm_service/
A Dpm_api_sys.h58 enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider,
60 enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider,
A Dpm_api_sys.c574 enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider, in pm_clock_set_divider() argument
581 clk_id, divider); in pm_clock_set_divider()
595 enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider, in pm_clock_get_divider() argument
604 return pm_ipi_send_sync(primary_proc, payload, divider, 1); in pm_clock_get_divider()
/trusted-firmware-a/docs/build/TF-A_2.5/_static/css/
A Dtheme.css4 …pdown-menu>dd>a:hover{background:#2980b9;color:#fff}.wy-dropdown-menu>dd.divider{border-top:1px so…

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