| /trusted-firmware-a/plat/arm/common/ |
| A D | arm_pm.c | 108 int arm_validate_ns_entrypoint(uintptr_t entrypoint) in arm_validate_ns_entrypoint() argument
114 if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint < in arm_validate_ns_entrypoint()
119 if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint < in arm_validate_ns_entrypoint()
128 int arm_validate_psci_entrypoint(uintptr_t entrypoint) in arm_validate_psci_entrypoint() argument
130 return (arm_validate_ns_entrypoint(entrypoint) == 0) ? PSCI_E_SUCCESS : in arm_validate_psci_entrypoint()
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| /trusted-firmware-a/plat/xilinx/zynqmp/ |
| A D | zynqmp_sdei.c | 17 int arm_validate_ns_entrypoint(uintptr_t entrypoint) in arm_validate_ns_entrypoint() argument
19 return (entrypoint < BL31_BASE || entrypoint > BL31_LIMIT) ? 0 : -1; in arm_validate_ns_entrypoint()
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| /trusted-firmware-a/plat/brcm/board/stingray/src/ |
| A D | brcm_pm_ops.c | 318 static int brcm_validate_ns_entrypoint(uintptr_t entrypoint) in brcm_validate_ns_entrypoint() argument
324 if ((entrypoint >= BRCM_NS_DRAM1_BASE) && in brcm_validate_ns_entrypoint()
325 (entrypoint < (BRCM_NS_DRAM1_BASE + BRCM_NS_DRAM1_SIZE))) in brcm_validate_ns_entrypoint()
328 if ((entrypoint >= BRCM_DRAM2_BASE) && in brcm_validate_ns_entrypoint()
329 (entrypoint < (BRCM_DRAM2_BASE + BRCM_DRAM2_SIZE))) in brcm_validate_ns_entrypoint()
332 if ((entrypoint >= BRCM_DRAM3_BASE) && in brcm_validate_ns_entrypoint()
333 (entrypoint < (BRCM_DRAM3_BASE + BRCM_DRAM3_SIZE))) in brcm_validate_ns_entrypoint()
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| /trusted-firmware-a/lib/psci/ |
| A D | psci_common.c | 628 uintptr_t entrypoint, in psci_get_ns_ep_info() argument
647 ep->pc = entrypoint; in psci_get_ns_ep_info()
661 if ((entrypoint & 0x1UL) != 0UL) in psci_get_ns_ep_info()
679 ep->spsr = SPSR_MODE32((uint64_t)mode, entrypoint & 0x1, ee, in psci_get_ns_ep_info()
687 uintptr_t entrypoint, in psci_get_ns_ep_info() argument
714 ep->pc = entrypoint; in psci_get_ns_ep_info()
726 ep->spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, aif); in psci_get_ns_ep_info()
739 uintptr_t entrypoint, in psci_validate_entry_point() argument
746 rc = psci_plat_pm_ops->validate_ns_entrypoint(entrypoint); in psci_validate_entry_point()
756 rc = psci_get_ns_ep_info(ep, entrypoint, context_id); in psci_validate_entry_point()
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| A D | psci_main.c | 25 uintptr_t entrypoint, in psci_cpu_on() argument
38 rc = psci_validate_entry_point(&ep, entrypoint, context_id); in psci_cpu_on()
55 uintptr_t entrypoint, in psci_cpu_suspend() argument
134 rc = psci_validate_entry_point(&ep, entrypoint, context_id); in psci_cpu_suspend()
154 int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id) in psci_system_suspend() argument
165 rc = psci_validate_entry_point(&ep, entrypoint, context_id); in psci_system_suspend()
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| /trusted-firmware-a/plat/marvell/armada/a3k/common/aarch64/ |
| A D | plat_helpers.S | 45 beq entrypoint
48 entrypoint: label
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| /trusted-firmware-a/plat/hisilicon/poplar/ |
| A D | plat_pm.c | 131 static int poplar_validate_ns_entrypoint(uintptr_t entrypoint) in poplar_validate_ns_entrypoint() argument
137 if ((entrypoint >= DDR_BASE) && (entrypoint < (DDR_BASE + DDR_SIZE))) in poplar_validate_ns_entrypoint()
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| /trusted-firmware-a/plat/qemu/common/ |
| A D | qemu_pm.c | 108 static int qemu_validate_ns_entrypoint(uintptr_t entrypoint) in qemu_validate_ns_entrypoint() argument
114 if ((entrypoint >= NS_DRAM0_BASE) && in qemu_validate_ns_entrypoint()
115 (entrypoint < (NS_DRAM0_BASE + NS_DRAM0_SIZE))) in qemu_validate_ns_entrypoint()
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| /trusted-firmware-a/plat/nvidia/tegra/common/ |
| A D | tegra_pm.c | 250 static int32_t tegra_validate_ns_entrypoint(uintptr_t entrypoint) in tegra_validate_ns_entrypoint() argument
258 if ((entrypoint >= TEGRA_DRAM_BASE) && (entrypoint <= TEGRA_DRAM_END)) { in tegra_validate_ns_entrypoint()
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| A D | tegra_fiq_glue.c | 119 void tegra_fiq_set_ns_entrypoint(uint64_t entrypoint) in tegra_fiq_set_ns_entrypoint() argument
121 ns_fiq_handler_addr = entrypoint; in tegra_fiq_set_ns_entrypoint()
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| /trusted-firmware-a/include/lib/el3_runtime/ |
| A D | context_mgmt.h | 46 void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint);
48 uintptr_t entrypoint, uint32_t spsr);
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| /trusted-firmware-a/bl32/sp_min/ |
| A D | sp_min.ld.S | 31 *entrypoint.o(.text*)
63 *entrypoint.o(.text*)
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| /trusted-firmware-a/plat/hisilicon/hikey/ |
| A D | hikey_pm.c | 252 static int hikey_validate_ns_entrypoint(uintptr_t entrypoint) in hikey_validate_ns_entrypoint() argument
258 if ((entrypoint > DDR_BASE) && (entrypoint < (DDR_BASE + DDR_SIZE))) in hikey_validate_ns_entrypoint()
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| /trusted-firmware-a/plat/st/stm32mp1/ |
| A D | stm32mp1_pm.c | 184 static int stm32_validate_ns_entrypoint(uintptr_t entrypoint) in stm32_validate_ns_entrypoint() argument
187 if (entrypoint < STM32MP_DDR_BASE) { in stm32_validate_ns_entrypoint()
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| /trusted-firmware-a/plat/nvidia/tegra/drivers/flowctrl/ |
| A D | flowctrl.c | 262 void tegra_fc_bpmp_on(uint32_t entrypoint) in tegra_fc_bpmp_on() argument
271 mmio_write_32(TEGRA_EVP_BASE + EVP_BPMP_RESET_VECTOR, entrypoint); in tegra_fc_bpmp_on()
272 while (entrypoint != mmio_read_32(TEGRA_EVP_BASE + EVP_BPMP_RESET_VECTOR)) in tegra_fc_bpmp_on()
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| /trusted-firmware-a/include/services/ |
| A D | spm_core_manifest.h | 39 uint64_t entrypoint; member
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| /trusted-firmware-a/plat/hisilicon/hikey960/ |
| A D | hikey960_pm.c | 176 static int hikey960_validate_ns_entrypoint(uintptr_t entrypoint) in hikey960_validate_ns_entrypoint() argument
182 if ((entrypoint > DDR_BASE) && (entrypoint < (DDR_BASE + DDR_SIZE))) in hikey960_validate_ns_entrypoint()
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| /trusted-firmware-a/include/lib/psci/ |
| A D | psci.h | 335 uintptr_t entrypoint,
338 uintptr_t entrypoint,
340 int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id);
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| /trusted-firmware-a/plat/common/ |
| A D | plat_spmd_manifest.c | 75 rc = fdt_read_uint64(fdt, node, "entrypoint", &attr->entrypoint); in manifest_parse_attribute()
86 VERBOSE(" entrypoint: 0x%" PRIx64 "\n", attr->entrypoint); in manifest_parse_attribute()
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| /trusted-firmware-a/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 783 void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint) in cm_set_elr_el3() argument
793 write_ctx_reg(state, CTX_ELR_EL3, entrypoint); in cm_set_elr_el3()
801 uintptr_t entrypoint, uint32_t spsr) in cm_set_elr_spsr_el3() argument
811 write_ctx_reg(state, CTX_ELR_EL3, entrypoint); in cm_set_elr_spsr_el3()
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| /trusted-firmware-a/plat/rpi/common/ |
| A D | rpi3_pm.c | 277 uintptr_t *entrypoint = (void *) PLAT_RPI3_TM_ENTRYPOINT; in plat_setup_psci_ops() local
279 *entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a/plat/arm/board/diphda/common/fdts/ |
| A D | diphda_spmc_manifest.dts | 26 entrypoint = <0x0 0x2002000>;
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| /trusted-firmware-a/plat/arm/board/fvp/fdts/ |
| A D | fvp_spmc_optee_sp_manifest.dts | 26 entrypoint = <0x0 0x6000000>;
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| /trusted-firmware-a/plat/nvidia/tegra/soc/t210/ |
| A D | plat_psci_handlers.c | 437 uint32_t val, entrypoint = 0; in tegra_soc_pwr_domain_on_finish() local
482 entrypoint = tegra_pmc_read_32(PMC_SCRATCH39); in tegra_soc_pwr_domain_on_finish()
483 tegra_fc_bpmp_on(entrypoint); in tegra_soc_pwr_domain_on_finish()
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| /trusted-firmware-a/include/plat/arm/common/ |
| A D | plat_arm.h | 190 int arm_validate_psci_entrypoint(uintptr_t entrypoint);
191 int arm_validate_ns_entrypoint(uintptr_t entrypoint);
|