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Searched refs:mt8173_mcucfg (Results 1 – 5 of 5) sorted by relevance

/trusted-firmware-a/plat/mediatek/mt8173/
A Dbl31_plat_setup.c34 mmio_write_32((uintptr_t)&mt8173_mcucfg->mp1_config_res, in platform_setup_cpu()
40 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg, MP1_AINACTS); in platform_setup_cpu()
41 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_clkenm_div, in platform_setup_cpu()
43 mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp1_rst_ctl, in platform_setup_cpu()
47 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_cpucfg, in platform_setup_cpu()
51 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp0_rv_addr[0].rv_addr_hw, in platform_setup_cpu()
55 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->bus_fabric_dcm_ctrl, in platform_setup_cpu()
59 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->l2c_sram_ctrl, in platform_setup_cpu()
61 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->cci_clk_ctrl, in platform_setup_cpu()
A Dscu.c15 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg, in disable_scu()
18 mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config, in disable_scu()
25 mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg, in enable_scu()
28 mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config, in enable_scu()
A Dplat_pm.c267 rv = (uintptr_t)&mt8173_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_power_domain_on()
269 rv = (uintptr_t)&mt8173_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_power_domain_on()
333 rv = (uintptr_t)&mt8173_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_power_domain_suspend()
335 rv = (uintptr_t)&mt8173_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_power_domain_suspend()
/trusted-firmware-a/plat/mediatek/mt8173/drivers/timer/
A Dmt_cpuxgpt.c16 mmio_write_32((uintptr_t)&mt8173_mcucfg->xgpt_idx, reg_index); in write_cpuxgpt()
17 mmio_write_32((uintptr_t)&mt8173_mcucfg->xgpt_ctl, value); in write_cpuxgpt()
/trusted-firmware-a/plat/mediatek/mt8173/include/
A Dmcucfg.h104 static struct mt8173_mcucfg_regs *const mt8173_mcucfg = (void *)MCUCFG_BASE; variable

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