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/trusted-firmware-a/drivers/mtd/nand/
A Draw_nand.c142 addr[i++] = page; in nand_read_page_cmd()
143 addr[i++] = page >> 8; in nand_read_page_cmd()
145 addr[i++] = page >> 16; in nand_read_page_cmd()
285 struct nand_param_page page; in nand_read_param_page() local
304 ret = nand_read_data((uint8_t *)&page, sizeof(page), true); in nand_read_param_page()
315 page.crc16) { in nand_read_param_page()
327 page.bytes_per_page; in nand_read_param_page()
330 page.bytes_per_page * in nand_read_param_page()
331 page.num_blk_in_lun * page.num_lun; in nand_read_param_page()
376 uint8_t page; in nand_mtd_block_is_bad() local
[all …]
A Dcore.c33 unsigned int page; in nand_read() local
68 for (page = page_start; page < nb_pages; page++) { in nand_read()
73 (block * nb_pages) + page, in nand_read()
90 (block * nb_pages) + page, in nand_read()
A Dspi_nand.c160 static int spi_nand_load_page(unsigned int page) in spi_nand_load_page() argument
163 uint32_t block_nb = page / spinand_dev.nand_dev->block_size; in spi_nand_load_page()
164 uint32_t page_nb = page - (block_nb * spinand_dev.nand_dev->page_size); in spi_nand_load_page()
179 static int spi_nand_read_from_cache(unsigned int page, unsigned int offset, in spi_nand_read_from_cache() argument
184 uint32_t block_nb = page / nbpages_per_block; in spi_nand_read_from_cache()
199 static int spi_nand_read_page(unsigned int page, unsigned int offset, in spi_nand_read_page() argument
211 ret = spi_nand_load_page(page); in spi_nand_read_page()
221 ret = spi_nand_read_from_cache(page, offset, buffer, len); in spi_nand_read_page()
256 static int spi_nand_mtd_read_page(struct nand_device *nand, unsigned int page, in spi_nand_mtd_read_page() argument
259 return spi_nand_read_page(page, 0, (uint8_t *)buffer, in spi_nand_mtd_read_page()
/trusted-firmware-a/plat/socionext/uniphier/
A Duniphier_nand.c77 int page = nand->pages_per_block * block; in uniphier_nand_block_isbad() local
95 uniphier_nand_host_write(nand, DENALI_MAP11_ADDR, page & 0xff); in uniphier_nand_block_isbad()
96 uniphier_nand_host_write(nand, DENALI_MAP11_ADDR, (page >> 8) & 0xff); in uniphier_nand_block_isbad()
99 (page >> 16) & 0xff); in uniphier_nand_block_isbad()
169 int page = lba % pages_per_block; in __uniphier_nand_read() local
195 page_count = MIN(pages_per_block - page, pages_to_read); in __uniphier_nand_read()
198 block * pages_per_block + page, in __uniphier_nand_read()
204 page = 0; in __uniphier_nand_read()
/trusted-firmware-a/docs/build/latex/
A Dsphinxmessages.sty8 \renewcommand{\literalblockcontinuedname}{continued from previous page}
9 \renewcommand{\literalblockcontinuesname}{continues on next page}
13 \def\pageautorefname{page}
A Dsphinxlatexstylepage.sty4 \ProvidesFile{sphinxlatexstylepage.sty}[2021/01/27 page styling]
59 % Update the plain style so we get the page number & footer line,
61 % page of a chapter `clean.'
A Dsphinx.xdy27 ;; man page says to use rather xelatex or lualatex in case of Cyrillic
77 (define-location-class "arabic-page-numbers" ("arabic-numbers"))
78 (define-location-class "roman-page-numbers" ("roman-numbers-lowercase"))
79 (define-location-class "Roman-page-numbers" ("roman-numbers-uppercase"))
80 (define-location-class "alpha-page-numbers" ("alpha"))
81 (define-location-class "Alpha-page-numbers" ("ALPHA"))
A Dsphinxhowto.cls41 % Change the title page to look a bit better, and fit in with the fncychap
86 % so no page break before it.
A Dsphinxmanual.cls44 % Change the title page to look a bit better, and fit in with the fncychap
96 % before resetting page counter, let's do the right thing.
A Dsphinxpackagefootnote.sty352 % macros to access the page number of footnote text and decide whether to print
355 % #1=label for reference, #2=page where footnote was printed
357 % same page
365 \def\sphinxfootref@page {#2}%
374 \edef\spx@tempa{\thepage}\edef\spx@tempb{\sphinxfootref@page}%
375 \protected@xdef\@thefnmark{\spx@thefnmark{\sphinxfootref@label}{\sphinxfootref@page}}%
A Dsphinxlatexliterals.sty54 % limitations with wrapped long code line not allowing page break.
60 % Skip to next page if not enough space at bottom
64 % - with framing allowing page breaks ("framed.sty")
111 % #2 = for material below frame, such as a caption or "continues on next page"
154 \newcommand*\literalblockcontinuedname{continued from previous page}%
155 \newcommand*\literalblockcontinuesname{continues on next page}%
499 % will not be separated from upcoming verbatim by a page break
614 \nobreak % update page totals
625 % on top of next page and give (if no contents after code-block)
628 % now add all to accumulated page totals and compare to \pagegoal
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A Dsphinxlatexadmonitions.sty69 % Nesting works (inner frames do not allow page breaks).
112 % set footnotes at bottom of page
A Dsphinx.sty310 % Memo: we expect some subtle redefinition of \thesphinxscope to be a part of page
314 % this is used to make reference to an explicitly numbered footnote not on same page
315 % #1=label of footnote text, #2=page number where footnote text was printed
/trusted-firmware-a/plat/nvidia/tegra/scat/
A Dbl31.scat20 /* BL31_BASE address must be aligned on a page boundary. */
103 * address, but we need to place them in a separate page so that we can set
242 * The base address of the coherent memory section must be page-aligned (4K)
245 * memory attributes for the coherent data page tables.
/trusted-firmware-a/include/drivers/
A Dnand.h32 int (*mtd_read_page)(struct nand_device *nand, unsigned int page,
A Draw_nand.h173 int nand_read_page_cmd(unsigned int page, unsigned int offset,
/trusted-firmware-a/build/qemu/release/bl1/
A Dbl1.ld12 "BL1_RO_BASE address is not aligned on a page boundary.")
38 "BL1_RW_BASE address is not aligned on a page boundary.")
/trusted-firmware-a/build/qemu/release/bl2/
A Dbl2.ld11 "BL2_BASE address is not aligned on a page boundary.")
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/components/
A Dromlib-design.rst.txt119 - The ROM library needs a page aligned RAM section to hold the RW data. This
121 On Arm platforms a section of 1 page (0x1000) is allocated at the top of SRAM.
122 This will have for effect to shift down all the BL images by 1 page.
/trusted-firmware-a/docs/components/
A Dromlib-design.rst119 - The ROM library needs a page aligned RAM section to hold the RW data. This
121 On Arm platforms a section of 1 page (0x1000) is allocated at the top of SRAM.
122 This will have for effect to shift down all the BL images by 1 page.
/trusted-firmware-a/build/qemu/release/bl31/
A Dbl31.ld11 "BL31_BASE address is not aligned on a page boundary.")
/trusted-firmware-a/docs/process/
A Dplatform-compatibility-policy.rst25 deprecated, the page must be updated to indicate the release after which the
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/process/
A Dplatform-compatibility-policy.rst.txt25 deprecated, the page must be updated to indicate the release after which the
/trusted-firmware-a/drivers/st/fmc/
A Dstm32_fmc2_nand.c506 unsigned int page, uintptr_t buffer) in stm32_fmc2_read_page() argument
518 VERBOSE(">%s page %i buffer %lx\n", __func__, page, buffer); in stm32_fmc2_read_page()
520 ret = nand_read_page_cmd(page, 0U, 0U, 0U); in stm32_fmc2_read_page()
/trusted-firmware-a/docs/plat/
A Dstm32mp1.rst8 More information can be found on `STM32MP1 Series`_ page.
26 The `STM32MP1 part number codification`_ page gives more information about part numbers.

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