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Searched refs:params (Results 1 – 25 of 42) sorted by relevance

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/trusted-firmware-a/plat/hisilicon/hikey/
A Dhikey_bl1_setup.c83 dw_mmc_params_t params; in bl1_platform_setup() local
97 memset(&params, 0, sizeof(dw_mmc_params_t)); in bl1_platform_setup()
98 params.reg_base = DWMMC0_BASE; in bl1_platform_setup()
99 params.desc_base = HIKEY_BL1_MMC_DESC_BASE; in bl1_platform_setup()
100 params.desc_size = 1 << 20; in bl1_platform_setup()
101 params.clk_rate = 24 * 1000 * 1000; in bl1_platform_setup()
102 params.bus_width = MMC_BUS_WIDTH_8; in bl1_platform_setup()
103 params.flags = MMC_FLAG_CMD23; in bl1_platform_setup()
105 dw_mmc_init(&params, &mmc_info); in bl1_platform_setup()
A Dhikey_bl2_setup.c293 dw_mmc_params_t params; in bl2_platform_setup() local
318 memset(&params, 0, sizeof(dw_mmc_params_t)); in bl2_platform_setup()
319 params.reg_base = DWMMC0_BASE; in bl2_platform_setup()
320 params.desc_base = HIKEY_MMC_DESC_BASE; in bl2_platform_setup()
321 params.desc_size = 1 << 20; in bl2_platform_setup()
322 params.clk_rate = 24 * 1000 * 1000; in bl2_platform_setup()
323 params.bus_width = MMC_BUS_WIDTH_8; in bl2_platform_setup()
324 params.flags = MMC_FLAG_CMD23; in bl2_platform_setup()
326 dw_mmc_init(&params, &mmc_info); in bl2_platform_setup()
/trusted-firmware-a/drivers/synopsys/ufs/
A Ddw_ufs.c16 static int dwufs_phy_init(ufs_params_t *params) in dwufs_phy_init() argument
23 assert((params != NULL) && (params->reg_base != 0)); in dwufs_phy_init()
25 base = params->reg_base; in dwufs_phy_init()
103 assert((params != NULL) && (params->reg_base != 0)); in dwufs_phy_set_pwr_mode()
105 base = params->reg_base; in dwufs_phy_set_pwr_mode()
106 flags = params->flags; in dwufs_phy_set_pwr_mode()
191 int dw_ufs_init(dw_ufs_params_t *params) in dw_ufs_init() argument
196 ufs_params.reg_base = params->reg_base; in dw_ufs_init()
197 ufs_params.desc_base = params->desc_base; in dw_ufs_init()
198 ufs_params.desc_size = params->desc_size; in dw_ufs_init()
[all …]
/trusted-firmware-a/plat/imx/imx8m/imx8mm/
A Dimx8mm_bl2_el3_setup.c43 imx_usdhc_params_t params; in imx8mm_usdhc_setup() local
46 params.reg_base = PLAT_IMX8MM_BOOT_MMC_BASE; in imx8mm_usdhc_setup()
58 params.clk_rate = 50000000; in imx8mm_usdhc_setup()
59 params.bus_width = MMC_BUS_WIDTH_1; in imx8mm_usdhc_setup()
60 params.flags = 0; in imx8mm_usdhc_setup()
63 imx_usdhc_init(&params, &info); in imx8mm_usdhc_setup()
/trusted-firmware-a/plat/rpi/rpi3/
A Drpi3_bl2_setup.c32 struct rpi3_sdhost_params params; in rpi3_sdhost_setup() local
34 memset(&params, 0, sizeof(struct rpi3_sdhost_params)); in rpi3_sdhost_setup()
35 params.reg_base = RPI3_SDHOST_BASE; in rpi3_sdhost_setup()
36 params.bus_width = MMC_BUS_WIDTH_1; in rpi3_sdhost_setup()
37 params.clk_rate = 50000000; in rpi3_sdhost_setup()
39 rpi3_sdhost_init(&params, &mmc_info); in rpi3_sdhost_setup()
/trusted-firmware-a/plat/imx/imx7/warp7/
A Dwarp7_bl2_el3_setup.c103 imx_usdhc_params_t params; in warp7_usdhc_setup() local
105 zeromem(&params, sizeof(imx_usdhc_params_t)); in warp7_usdhc_setup()
106 params.reg_base = PLAT_WARP7_BOOT_MMC_BASE; in warp7_usdhc_setup()
107 params.clk_rate = 25000000; in warp7_usdhc_setup()
108 params.bus_width = MMC_BUS_WIDTH_8; in warp7_usdhc_setup()
110 imx_usdhc_init(&params, &mmc_info); in warp7_usdhc_setup()
/trusted-firmware-a/plat/imx/imx7/picopi/
A Dpicopi_bl2_el3_setup.c97 imx_usdhc_params_t params; in picopi_usdhc_setup() local
99 zeromem(&params, sizeof(imx_usdhc_params_t)); in picopi_usdhc_setup()
100 params.reg_base = PLAT_PICOPI_BOOT_MMC_BASE; in picopi_usdhc_setup()
101 params.clk_rate = 25000000; in picopi_usdhc_setup()
102 params.bus_width = MMC_BUS_WIDTH_8; in picopi_usdhc_setup()
104 imx_usdhc_init(&params, &mmc_info); in picopi_usdhc_setup()
/trusted-firmware-a/drivers/imx/usdhc/
A Dimx_usdhc.c289 void imx_usdhc_init(imx_usdhc_params_t *params, in imx_usdhc_init() argument
292 assert((params != 0) && in imx_usdhc_init()
293 ((params->reg_base & MMC_BLOCK_MASK) == 0) && in imx_usdhc_init()
294 (params->clk_rate > 0) && in imx_usdhc_init()
295 ((params->bus_width == MMC_BUS_WIDTH_1) || in imx_usdhc_init()
296 (params->bus_width == MMC_BUS_WIDTH_4) || in imx_usdhc_init()
297 (params->bus_width == MMC_BUS_WIDTH_8))); in imx_usdhc_init()
299 memcpy(&imx_usdhc_params, params, sizeof(imx_usdhc_params_t)); in imx_usdhc_init()
300 mmc_init(&imx_usdhc_ops, params->clk_rate, params->bus_width, in imx_usdhc_init()
301 params->flags, mmc_dev_info); in imx_usdhc_init()
/trusted-firmware-a/drivers/synopsys/emmc/
A Ddw_mmc.c418 assert((params != 0) && in dw_mmc_init()
419 ((params->reg_base & MMC_BLOCK_MASK) == 0) && in dw_mmc_init()
420 ((params->desc_base & MMC_BLOCK_MASK) == 0) && in dw_mmc_init()
422 (params->desc_size > 0) && in dw_mmc_init()
423 (params->clk_rate > 0) && in dw_mmc_init()
424 ((params->bus_width == MMC_BUS_WIDTH_1) || in dw_mmc_init()
425 (params->bus_width == MMC_BUS_WIDTH_4) || in dw_mmc_init()
426 (params->bus_width == MMC_BUS_WIDTH_8))); in dw_mmc_init()
428 memcpy(&dw_params, params, sizeof(dw_mmc_params_t)); in dw_mmc_init()
430 mmc_init(&dw_mmc_ops, params->clk_rate, params->bus_width, in dw_mmc_init()
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/trusted-firmware-a/plat/st/common/
A Dbl2_io_storage.c159 struct stm32_sdmmc2_params params; in boot_mmc() local
161 zeromem(&params, sizeof(struct stm32_sdmmc2_params)); in boot_mmc()
167 params.reg_base = STM32MP_SDMMC1_BASE; in boot_mmc()
170 params.reg_base = STM32MP_SDMMC2_BASE; in boot_mmc()
173 params.reg_base = STM32MP_SDMMC3_BASE; in boot_mmc()
178 params.reg_base = STM32MP_SDMMC1_BASE; in boot_mmc()
180 params.reg_base = STM32MP_SDMMC2_BASE; in boot_mmc()
185 params.device_info = &mmc_info; in boot_mmc()
186 if (stm32_sdmmc2_mmc_init(&params) != 0) { in boot_mmc()
A Dbl2_stm32_io_storage.c344 struct stm32_sdmmc2_params params; in boot_mmc() local
348 zeromem(&params, sizeof(struct stm32_sdmmc2_params)); in boot_mmc()
354 params.reg_base = STM32MP_SDMMC1_BASE; in boot_mmc()
357 params.reg_base = STM32MP_SDMMC2_BASE; in boot_mmc()
360 params.reg_base = STM32MP_SDMMC3_BASE; in boot_mmc()
365 params.reg_base = STM32MP_SDMMC1_BASE; in boot_mmc()
367 params.reg_base = STM32MP_SDMMC2_BASE; in boot_mmc()
372 params.device_info = &mmc_info; in boot_mmc()
373 if (stm32_sdmmc2_mmc_init(&params) != 0) { in boot_mmc()
/trusted-firmware-a/plat/brcm/board/common/
A Dbcm_elog_ddr.c115 setup.params[0] = TMP_ELOG_METADATA_BASE; in elog_init_ddr_log()
116 setup.params[1] = (sizeof(global) + global.rec_count * sizeof(rec)); in elog_init_ddr_log()
120 flush_dcache_range((uintptr_t)setup.params[0], setup.params[1]); in elog_init_ddr_log()
/trusted-firmware-a/lib/xlat_tables_v2/aarch32/
A Dxlat_tables_arch.c171 void setup_mmu_cfg(uint64_t *params, unsigned int flags, in setup_mmu_cfg() argument
257 params[MMU_CFG_MAIR] = mair; in setup_mmu_cfg()
258 params[MMU_CFG_TCR] = (uint64_t) ttbcr; in setup_mmu_cfg()
259 params[MMU_CFG_TTBR0] = ttbr0; in setup_mmu_cfg()
/trusted-firmware-a/plat/nvidia/tegra/soc/t194/drivers/mce/
A Dnvg.c212 uint64_t params = (uint64_t)(STRICT_CHECKING_ENABLED_SET | in nvg_enable_strict_checking_mode() local
215 nvg_set_request_data((uint64_t)TEGRA_NVG_CHANNEL_SECURITY_CONFIG, params); in nvg_enable_strict_checking_mode()
220 uint64_t params = (uint64_t)(STRICT_CHECKING_ENABLED_SET | in nvg_verify_strict_checking_mode() local
224 assert(params == (uint64_t)nvg_get_result()); in nvg_verify_strict_checking_mode()
/trusted-firmware-a/drivers/auth/cryptocell/713/
A Dcryptocell_crypto.c84 mbedtls_asn1_buf sig_oid, alg_oid, params; in verify_signature() local
99 rc = mbedtls_asn1_get_alg(&p, end, &sig_oid, &params); in verify_signature()
114 rc = mbedtls_x509_get_rsassa_pss_params(&params, &md_alg, in verify_signature()
221 mbedtls_asn1_buf hash_oid, params; in verify_hash() local
238 rc = mbedtls_asn1_get_alg(&p, end, &hash_oid, &params); in verify_hash()
/trusted-firmware-a/drivers/auth/cryptocell/712/
A Dcryptocell_crypto.c99 mbedtls_asn1_buf sig_oid, alg_oid, params; in verify_signature() local
112 rc = mbedtls_asn1_get_alg(&p, end, &sig_oid, &params); in verify_signature()
127 rc = mbedtls_x509_get_rsassa_pss_params(&params, &md_alg, in verify_signature()
246 mbedtls_asn1_buf hash_oid, params; in verify_hash() local
263 rc = mbedtls_asn1_get_alg(&p, end, &hash_oid, &params); in verify_hash()
/trusted-firmware-a/lib/xlat_tables_v2/aarch64/
A Dxlat_tables_arch.c247 void setup_mmu_cfg(uint64_t *params, unsigned int flags, in setup_mmu_cfg() argument
321 params[MMU_CFG_MAIR] = mair; in setup_mmu_cfg()
322 params[MMU_CFG_TCR] = tcr; in setup_mmu_cfg()
323 params[MMU_CFG_TTBR0] = ttbr0; in setup_mmu_cfg()
/trusted-firmware-a/plat/hisilicon/poplar/
A Dbl1_plat_setup.c97 dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE); in bl1_platform_setup() local
110 dw_mmc_init(&params, &mmc_info); in bl1_platform_setup()
A Dbl2_plat_setup.c177 dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE); in bl2_early_platform_setup2() local
192 dw_mmc_init(&params, &mmc_info); in bl2_early_platform_setup2()
/trusted-firmware-a/drivers/rpi3/sdhost/
A Drpi3_sdhost.c589 void rpi3_sdhost_init(struct rpi3_sdhost_params *params, in rpi3_sdhost_init() argument
592 assert((params != 0) && in rpi3_sdhost_init()
593 ((params->reg_base & MMC_BLOCK_MASK) == 0)); in rpi3_sdhost_init()
595 memcpy(&rpi3_sdhost_params, params, sizeof(struct rpi3_sdhost_params)); in rpi3_sdhost_init()
626 mmc_init(&rpi3_sdhost_ops, params->clk_rate, params->bus_width, in rpi3_sdhost_init()
627 params->flags, mmc_dev_info); in rpi3_sdhost_init()
/trusted-firmware-a/drivers/st/mmc/
A Dstm32_sdmmc2.c700 int stm32_sdmmc2_mmc_init(struct stm32_sdmmc2_params *params) in stm32_sdmmc2_mmc_init() argument
704 assert((params != NULL) && in stm32_sdmmc2_mmc_init()
705 ((params->reg_base & MMC_BLOCK_MASK) == 0U) && in stm32_sdmmc2_mmc_init()
706 ((params->bus_width == MMC_BUS_WIDTH_1) || in stm32_sdmmc2_mmc_init()
707 (params->bus_width == MMC_BUS_WIDTH_4) || in stm32_sdmmc2_mmc_init()
708 (params->bus_width == MMC_BUS_WIDTH_8))); in stm32_sdmmc2_mmc_init()
710 memcpy(&sdmmc2_params, params, sizeof(struct stm32_sdmmc2_params)); in stm32_sdmmc2_mmc_init()
/trusted-firmware-a/include/drivers/synopsys/
A Ddw_mmc.h22 void dw_mmc_init(dw_mmc_params_t *params, struct mmc_device_info *info);
/trusted-firmware-a/plat/intel/soc/agilex/
A Dbl2_plat_setup.c111 dw_mmc_params_t params = EMMC_INIT_PARAMS(0x100000, get_mmc_clk()); in bl2_el3_plat_arch_setup() local
118 dw_mmc_init(&params, &mmc_info); in bl2_el3_plat_arch_setup()
/trusted-firmware-a/plat/intel/soc/stratix10/
A Dbl2_plat_setup.c107 dw_mmc_params_t params = EMMC_INIT_PARAMS(0x100000, get_mmc_clk()); in bl2_el3_plat_arch_setup() local
114 dw_mmc_init(&params, &mmc_info); in bl2_el3_plat_arch_setup()
/trusted-firmware-a/include/drivers/st/
A Dstm32_sdmmc2.h30 int stm32_sdmmc2_mmc_init(struct stm32_sdmmc2_params *params);

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