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Searched refs:pos (Results 1 – 22 of 22) sorted by relevance

/trusted-firmware-a/plat/mediatek/mt8183/drivers/gpio/
A Dmtgpio.c36 uint32_t pos, bit; in mt_set_gpio_dir_chip() local
41 pos = pin / MAX_GPIO_REG_BITS; in mt_set_gpio_dir_chip()
52 uint32_t pos, bit; in mt_get_gpio_dir_chip() local
57 pos = pin / MAX_GPIO_REG_BITS; in mt_get_gpio_dir_chip()
66 uint32_t pos, bit; in mt_set_gpio_out_chip() local
71 pos = pin / MAX_GPIO_REG_BITS; in mt_set_gpio_out_chip()
82 uint32_t pos, bit; in mt_get_gpio_out_chip() local
87 pos = pin / MAX_GPIO_REG_BITS; in mt_get_gpio_out_chip()
96 uint32_t pos, bit; in mt_get_gpio_in_chip() local
110 uint32_t pos, bit; in mt_set_gpio_mode_chip() local
[all …]
/trusted-firmware-a/plat/mediatek/common/drivers/gpio/
A Dmtgpio_common.c30 uint32_t pos, bit; in mt_set_gpio_dir_chip() local
35 pos = pin / MAX_GPIO_REG_BITS; in mt_set_gpio_dir_chip()
39 mmio_write_32(DIR_BASE + 0x10U * pos + CLR, 1U << bit); in mt_set_gpio_dir_chip()
47 uint32_t pos, bit; in mt_get_gpio_dir_chip() local
52 pos = pin / MAX_GPIO_REG_BITS; in mt_get_gpio_dir_chip()
55 reg = mmio_read_32(DIR_BASE + 0x10U * pos); in mt_get_gpio_dir_chip()
61 uint32_t pos, bit; in mt_set_gpio_out_chip() local
66 pos = pin / MAX_GPIO_REG_BITS; in mt_set_gpio_out_chip()
78 uint32_t pos, bit; in mt_get_gpio_in_chip() local
83 pos = pin / MAX_GPIO_REG_BITS; in mt_get_gpio_in_chip()
[all …]
/trusted-firmware-a/drivers/io/
A Dio_mtd.c21 unsigned long long pos; /* Offset in bytes */ member
123 ret = ops->seek(cur->base, cur->pos, extra_offset); in mtd_add_extra_offset()
146 cur->pos = 0U; in mtd_open()
177 cur->pos = offset; in mtd_seek()
180 if (((cur->base + cur->pos + (unsigned long long)offset) >= in mtd_seek()
182 ((cur->base + cur->pos + (unsigned long long)offset) < in mtd_seek()
183 cur->base + cur->pos)) { in mtd_seek()
187 cur->pos += (unsigned long long)offset; in mtd_seek()
218 cur->base + cur->pos, buffer, length); in mtd_read()
223 ret = ops->read(cur->base + cur->pos + cur->extra_offset, buffer, in mtd_read()
[all …]
/trusted-firmware-a/plat/arm/board/arm_fpga/
A Dfpga_pm.c44 int pos = plat_core_pos_by_mpidr(mpidr); in fpga_pwr_domain_on() local
47 if (pos < 0) { in fpga_pwr_domain_on()
54 hold_base[pos] = PLAT_FPGA_HOLD_STATE_GO; in fpga_pwr_domain_on()
55 flush_dcache_range((uintptr_t)&hold_base[pos], sizeof(uint64_t)); in fpga_pwr_domain_on()
/trusted-firmware-a/drivers/rambus/
A Dtrng_ip_76.c216 static uint8_t pos; in eip76_rng_get_random() local
226 if (pos >= EIP76_RNG_OUTPUT_SIZE) { in eip76_rng_get_random()
227 pos = 0; in eip76_rng_get_random()
230 if (pos != 0U) { in eip76_rng_get_random()
237 if (pos || ret > 0) { in eip76_rng_get_random()
238 data[i] = rand[pos++]; in eip76_rng_get_random()
/trusted-firmware-a/plat/rpi/common/
A Drpi3_pm.c142 unsigned int pos = plat_core_pos_by_mpidr(mpidr); in rpi3_pwr_domain_on() local
145 assert(pos < PLATFORM_CORE_COUNT); in rpi3_pwr_domain_on()
147 hold_base += pos * PLAT_RPI3_TM_HOLD_ENTRY_SIZE; in rpi3_pwr_domain_on()
181 unsigned int pos = plat_my_core_pos(); in rpi3_pwr_down_wfi() local
183 if (pos == 0) { in rpi3_pwr_down_wfi()
/trusted-firmware-a/plat/arm/board/a5ds/
A Da5ds_pm.c18 unsigned int pos = plat_core_pos_by_mpidr(mpidr); in a5ds_pwr_domain_on() local
21 hold_base[pos] = A5DS_HOLD_STATE_GO; in a5ds_pwr_domain_on()
/trusted-firmware-a/plat/nvidia/tegra/soc/t186/
A Dplat_setup.c291 u_register_t cluster_id, cpu_id, pos; in plat_core_pos_by_mpidr() local
308 pos = cpu_id + (cluster_id << 2U); in plat_core_pos_by_mpidr()
311 if ((pos == TEGRA186_CLUSTER0_CORE2) || (pos == TEGRA186_CLUSTER0_CORE3)) { in plat_core_pos_by_mpidr()
314 ret = (int32_t)pos; in plat_core_pos_by_mpidr()
A Dplat_psci_handlers.c180 uint32_t num_cpus = ncpu, pos = 0; in tegra_last_cpu_in_cluster() local
183 target = states[pos]; in tegra_last_cpu_in_cluster()
188 pos++; in tegra_last_cpu_in_cluster()
/trusted-firmware-a/include/lib/
A Dbakery_lock.h26 static inline unsigned int bakery_get_priority(unsigned int t, unsigned int pos) in bakery_get_priority() argument
28 return (t << 8) | pos; in bakery_get_priority()
/trusted-firmware-a/plat/qemu/qemu_sbsa/
A Dsbsa_pm.c135 int pos = plat_core_pos_by_mpidr(mpidr); in qemu_pwr_domain_on() local
138 if (pos < 0) { in qemu_pwr_domain_on()
142 hold_base[pos] = PLAT_QEMU_HOLD_STATE_GO; in qemu_pwr_domain_on()
/trusted-firmware-a/docs/build/TF-A_2.5/_static/
A Ddoctools.js77 var pos = val.toLowerCase().indexOf(text);
78 if (pos >= 0 &&
89 span.appendChild(document.createTextNode(val.substr(pos, text.length)));
91 document.createTextNode(val.substr(pos + text.length)),
93 node.nodeValue = val.substr(0, pos);
A Djquery.js2 …turn this.options.duration?this.pos=t=S.easing[this.easing](e,this.options.duration*e,0,1,this.opt…
A Djquery-3.5.1.js7174 this.pos = eased = jQuery.easing[ this.easing ](
7178 this.pos = eased = percent;
/trusted-firmware-a/drivers/nxp/ddr/nxp-ddr/
A Dddrc.c60 uint32_t pos = 0U; in bist() local
78 pos = 37U; in bist()
87 pos = i; in bist()
91 pos, highest); in bist()
92 map_save = ddr_in32(&ddr->dec[pos >> 2]); in bist()
93 shift = (3U - pos % 4U) * 8U + 2U; in bist()
95 pos >> 2U, shift, map_save); in bist()
98 ddr_out32(&ddr->dec[pos >> 2U], temp32); in bist()
133 ddr_out32(&ddr->dec[pos >> 2], map_save); in bist()
/trusted-firmware-a/drivers/st/fmc/
A Dstm32_fmc2_nand.c441 uint16_t pos[8]; in stm32_fmc2_bch_correct() local
471 pos[0] = bchdsr1 & FMC2_BCHDSR1_EBP1_MASK; in stm32_fmc2_bch_correct()
472 pos[1] = (bchdsr1 & FMC2_BCHDSR1_EBP2_MASK) >> FMC2_BCHDSR1_EBP2_SHIFT; in stm32_fmc2_bch_correct()
473 pos[2] = bchdsr2 & FMC2_BCHDSR2_EBP3_MASK; in stm32_fmc2_bch_correct()
474 pos[3] = (bchdsr2 & FMC2_BCHDSR2_EBP4_MASK) >> FMC2_BCHDSR2_EBP4_SHIFT; in stm32_fmc2_bch_correct()
475 pos[4] = bchdsr3 & FMC2_BCHDSR3_EBP5_MASK; in stm32_fmc2_bch_correct()
476 pos[5] = (bchdsr3 & FMC2_BCHDSR3_EBP6_MASK) >> FMC2_BCHDSR3_EBP6_SHIFT; in stm32_fmc2_bch_correct()
477 pos[6] = bchdsr4 & FMC2_BCHDSR4_EBP7_MASK; in stm32_fmc2_bch_correct()
482 if (pos[i] < (eccsize * 8U)) { in stm32_fmc2_bch_correct()
483 uint8_t bitmask = BIT(pos[i] % 8U); in stm32_fmc2_bch_correct()
[all …]
/trusted-firmware-a/plat/qemu/common/
A Dqemu_pm.c143 unsigned pos = plat_core_pos_by_mpidr(mpidr); in qemu_pwr_domain_on() local
146 hold_base[pos] = PLAT_QEMU_HOLD_STATE_GO; in qemu_pwr_domain_on()
/trusted-firmware-a/plat/nvidia/tegra/soc/t194/
A Dplat_psci_handlers.c189 uint32_t num_cpus = ncpu, pos = 0; in tegra_last_on_cpu_in_cluster() local
192 target = states[pos]; in tegra_last_on_cpu_in_cluster()
197 pos++; in tegra_last_on_cpu_in_cluster()
/trusted-firmware-a/lib/zlib/
A Dzlib.h1820 z_off64_t pos; member
1826 ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : (gzgetc)(g))
1829 ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : (gzgetc)(g))
/trusted-firmware-a/drivers/renesas/common/ddr/ddr_b/
A Dboot_init_dram.c234 static inline uint32_t vch_nxt(uint32_t pos);
331 static inline uint32_t vch_nxt(uint32_t pos) in vch_nxt() argument
335 for (posn = pos; posn < DRAM_CH_CNT; posn++) { in vch_nxt()
/trusted-firmware-a/docs/build/latex/
A Dtrustedfirmware-a.aux370 \newlabel{getting_started/porting-guide:function-plat-my-core-pos}{{2.7.5}{60}{Function : plat\_my\…
372 \newlabel{getting_started/porting-guide:function-plat-core-pos-by-mpidr}{{2.7.5}{61}{Function : pla…
A Dtrustedfirmware-a.tex6432 \label{\detokenize{getting_started/porting-guide:function-plat-my-core-pos}}
6454 \label{\detokenize{getting_started/porting-guide:function-plat-core-pos-by-mpidr}}
11130 …t}{uint32\PYGZus{}t}\PYG{+w}{ }\PYG{n}{flag}\PYG{p}{,}\PYG{+w}{ }\PYG{n}{bit\PYGZus{}pos}\PYG{p}{;}
31274 \PYG{+w}{ }\PYG{k+kt}{uint32\PYGZus{}t}\PYG{+w}{ }\PYG{n}{bit\PYGZus{}pos}…

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