/trusted-firmware-a/drivers/imx/uart/ |
A D | imx_crash_uart.S | 31 mov r4, r0 35 add r1, r4, #IMX_UART_CR2_OFFSET 37 str r3, [r4, #IMX_UART_CR2_OFFSET] 48 str r3, [r4, #IMX_UART_CR1_OFFSET] 56 str r3, [r4, #IMX_UART_CR2_OFFSET] 64 str r3, [r4, #IMX_UART_CR3_OFFSET] 72 str r3, [r4, #IMX_UART_CR4_OFFSET] 84 str r3, [r4, #IMX_UART_FCR_OFFSET] 88 str r3, [r4, #IMX_UART_BIR_OFFSET] 92 str r0, [r4, #IMX_UART_BMR_OFFSET]
|
/trusted-firmware-a/common/aarch32/ |
A D | debug.S | 49 mls r4, r0, r5, r4 /* Find the remainder */ 85 ldr r4, =assert_msg1 87 mov r4, r5 93 ldr r4, =~0xffff 94 tst r6, r4 96 mov r4, r6 121 ldrb r0, [r4], #0x1 143 lsr r0, r4, r5 179 ldr r4, =panic_msg 183 mov r4, r6 [all …]
|
/trusted-firmware-a/lib/libc/aarch32/ |
A D | memset.S | 43 push {r4, lr} 44 mov r4, r1 49 stmiahs r12!, {r1, r3, r4, lr} 50 stmiahs r12!, {r1, r3, r4, lr} 52 popeq {r4, pc} /* return if 0 */ 54 stmiacs r12!, {r1, r3, r4, lr} /* write 16 bytes */ 55 popeq {r4, pc} /* return if 16 */ 59 popeq {r4, pc} /* return if 8 or 4 */ 63 pop {r4, pc}
|
/trusted-firmware-a/include/arch/aarch32/ |
A D | smccc_macros.S | 27 ldcopr r4, SCR 60 stcopr r4, SCR 63 mrs r4, sp_usr 72 stm r0!, {r4-r12} 74 mrs r4, sp_svc 83 stm r0!, {r4-r12} 86 ldcopr r4, SCR 169 ldcopr r4, SCR 201 stcopr r4, SCR 205 msr sp_usr, r4 [all …]
|
A D | smccc_helpers.h | 43 u_register_t r4; member 101 CASSERT(SMC_CTX_GPREG_R4 == __builtin_offsetof(smc_ctx_t, r4), \ 134 ((smc_ctx_t *)(_h))->r4 = (_r4); \ 157 _r4 = ((smc_ctx_t *)_hdl)->r4; \
|
/trusted-firmware-a/plat/imx/common/aarch32/ |
A D | imx_uart_console.S | 19 push {r4, lr} 20 mov r4, r3 21 cmp r4, #0 23 str r0, [r4, #CONSOLE_T_BASE] 29 mov r0, r4 30 pop {r4, lr} 34 pop {r4, pc}
|
/trusted-firmware-a/lib/psci/aarch32/ |
A D | psci_helpers.S | 30 push {r4, lr} 40 mov r4, r0 48 mov r0, r4 49 pop {r4, lr} 105 push {r4, lr} 119 mov r4, r0 131 sub r0, r4, #PLATFORM_STACK_SIZE 135 pop {r4, pc}
|
/trusted-firmware-a/lib/cpus/aarch32/ |
A D | cpu_helpers.S | 95 push {r4 - r6, lr} 108 pop {r4 - r6, pc} 126 ldr r4, =(__CPU_OPS_START__ + CPU_MIDR) 140 cmp r4, r5 144 ldr r1, [r4], #CPU_OPS_SIZE 152 sub r0, r4, #(CPU_OPS_SIZE + CPU_MIDR) 219 push {r4, r5, r12, lr} 248 mov r4, r0 259 blxne r4 262 pop {r4, r5, r12, pc}
|
A D | cortex_a57.S | 407 mov r4, r0 410 mov r0, r4 415 mov r0, r4 420 mov r0, r4 425 mov r0, r4 430 mov r0, r4 435 mov r0, r4 440 mov r0, r4 445 mov r0, r4 450 mov r0, r4 [all …]
|
A D | cortex_a53.S | 187 mov r4, r0 190 mov r0, r4 195 mov r0, r4 200 mov r0, r4 295 mov r4, r0
|
A D | cortex_a17.S | 111 mov r4, r0 129 mov r4, r0 132 mov r0, r4 137 mov r0, r4
|
/trusted-firmware-a/plat/common/aarch32/ |
A D | platform_mp_stack.S | 22 push {r4, lr} 24 pop {r4, pc} 35 mov r4, lr 38 bx r4
|
/trusted-firmware-a/plat/rockchip/common/aarch32/ |
A D | plat_helpers.S | 96 push { r4 - r7, lr } 117 ldr r4, =cpuson_flags 118 add r4, r4, r7, lsl #2 119 ldr r1, [r4] 138 str r1, [r4] 145 pop { r4 - r7, lr }
|
/trusted-firmware-a/plat/st/stm32mp1/ |
A D | stm32mp1_helper.S | 40 ldr r4, =abort_str 42 mrs r4, lr_abt 43 sub r4, r4, #4 50 ldr r4, =undefined_str 52 mrs r4, lr_und 58 ldr r4, =exception_start_str 60 mov r4, r9 62 ldr r4, =exception_end_str 64 mov r4, r6 69 ldr r4, =end_error_str
|
/trusted-firmware-a/drivers/st/uart/aarch32/ |
A D | stm32_console.S | 112 push {r4, lr} 113 mov r4, r3 114 cmp r4, #0 116 str r0, [r4, #CONSOLE_T_BASE] 122 mov r0, r4 123 pop {r4, lr} 127 pop {r4, pc}
|
/trusted-firmware-a/drivers/arm/pl011/aarch32/ |
A D | pl011_console.S | 107 push {r4, lr} 108 mov r4, r3 109 cmp r4, #0 111 str r0, [r4, #CONSOLE_T_BASE] 117 mov r0, r4 118 pop {r4, lr} 122 pop {r4, pc}
|
/trusted-firmware-a/drivers/ti/uart/aarch32/ |
A D | 16550_console.S | 110 push {r4, lr} 111 mov r4, r3 112 cmp r4, #0 114 str r0, [r4, #CONSOLE_T_BASE] 125 mov r0, r4 126 pop {r4, lr} 130 pop {r4, pc}
|
/trusted-firmware-a/lib/aarch32/ |
A D | misc_helpers.S | 30 ldm sp, {r4, r5, r6} 298 ldr r4, [r3] 301 cmp r4, r6 305 cmp r4, r7 308 add r4, r0, r4 309 str r4, [r3]
|
A D | cache_helpers.S | 93 push {r4-r12, lr} 108 ubfx r4, r12, #3, #10 // r4 = maximum way number (right aligned) 109 clz r5, r4 // r5 = the bit position of the way size increment 110 mov r9, r4 // r9 working copy of the aligned max way number 136 pop {r4-r12, pc}
|
/trusted-firmware-a/bl1/aarch32/ |
A D | bl1_entrypoint.S | 77 mov r4, r0 80 ldr r5, [r4, #SMC_CTX_SCR] 97 mov r0, r4
|
A D | bl1_exceptions.S | 137 mov r4, r0 140 ldr r5, [r4, #SMC_CTX_SCR] 155 mov r0, r4
|
/trusted-firmware-a/lib/stack_protector/aarch32/ |
A D | asm_stack_protector.S | 25 mov r4, lr 31 bx r4
|
/trusted-firmware-a/include/lib/pmf/aarch32/ |
A D | pmf_asm_macros.S | 18 mov r4, lr 20 mov lr, r4
|
/trusted-firmware-a/bl32/sp_min/aarch32/ |
A D | entrypoint.S | 129 route_fiq_to_sp_min r4 208 ldrd r4, r5, [sp], #8 210 strd r4, r5, [r0, #CPU_DATA_PMF_TS0_OFFSET] 353 mov r4, r0 365 strd r0, r1, [r4]
|
/trusted-firmware-a/plat/arm/css/common/aarch32/ |
A D | css_helpers.S | 76 mov r4, r0 82 cmp r0, r4
|